AD71028JST AD [Analog Devices], AD71028JST Datasheet - Page 16

• Manufacturer Part Number: AD71028JST
• Description: Dual Digital BTSC Encoder with Integrated DAC
• Manufacturer: AD [Analog Devices]

AD71028
ANALOG OUTPUT SECTION
Figure 11 shows the block diagram of the analog output section
(one of two channels). A series of current sources is controlled
by a digital Σ-∆ modulator. Depending on the digital code from
the modulator, each current source is connected to the sum-
ming junction of either a positive I-to-V converter or a negative
I-to-V converter. Two extra current sources that push instead of
pull are added to set the midscale common-mode voltage.
All current sources are derived from the VREF input pin. The
gain of the AD71028 is directly proportional to the magnitude
of the current sources, and therefore the gain of the AD71028 is
proportional to the voltage on the VREF pin. The nominal
VREF voltage should be set to 2.5 V, using a simple resistive
divider from the analog supply. The VREF and biasing circuits
are common to both DACs.
OUT+
Σ–∆ MODULATOR
FROM DIGITAL
(DIG_IN)
I
REF
Figure 11. Internal DAC Analog Architecture
+ DIG_IN
I
REF
SWITCHED CURRENT
SOURCES
BIAS
V
REF
IN
I
REF
I
REF
– DIG_IN
OUT–
Rev. 0 | Page 16 of 20
Since the VREF input effectively multiplies the signal, care must
be taken to ensure that no ac signals appear on this pin. This
can be accomplished by using a large decoupling capacitor in
the VREF external resistive divider circuit. If the VREF signal is
derived by dividing the 5 V analog supply, the time constant of
the divider must effectively filter any noise on the supply. If the
VREF signal is derived from an unregulated power amplifier
supply, the time constant must be longer because the ripple on
the amplifier supply voltage will presumably be greater than in
the case of the 5 V supply.
The AD71028 should be used with an external third-order filter
on each output channel. The circuit shown in Figure 12
combines a third-order filter and a single-ended-to-differential
converter in the same circuit. The values shown are for a
100 kHz Bessel filter. The use of a Bessel filter is important to
maintain the time alignment of the pilot to the carrier. If these
signals are not in phase, a loss of separation will occur.
The outputs can also be used single-ended, with some loss of
performance; the DAC distortion may become significantly
poorer, although the SNR will remain quite high.
For best performance, a large (>10 µF) capacitor should be
connected between the FILTCAP pin and analog ground.
Figure 12. Recommended External Analog Filter for Each Channel
–INPUT
+INPUT
2.80kΩ
806Ω
2.7nF
1nF
3.01kΩ
1.50kΩ
1.00kΩ
499kΩ
270pF
820pF
2.2nF
549Ω
OUT