CY7C0241 CYPRESS [Cypress Semiconductor], CY7C0241 Datasheet - Page 11
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CY7C0241
Manufacturer Part Number
CY7C0241
Description
4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT, BUSY
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY7C0241.pdf
(21 pages)
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Document #: 38-06035 Rev. *C
Switching Waveforms
Notes:
Read Cycle No. 3 (Either Port)
22. R/W is HIGH for read cycles
23. Device is continuously selected CE = V
24. OE = V
25. Address valid prior to or coincident with CE transition LOW.
26. To access RAM, CE = V
Read Cycle No. 2 (Either Port CE/OE Access)
Read Cycle No. 1 (Either Port Address Access)
CURRENT
DATA OUT
ADDRESS
DATA OUT
ADDRESS
DATA OUT
UB or LB
LB or UB
CE and
IL
.
CE
I
OE
I
CC
SB
PREVIOUS DATA VALID
IL
, UB or LB = V
t
OHA
[22, 24, 25, 25, 26]
IL
IL
and UB or LB = V
, SEM = V
t
AA
t
PU
t
AA
IH
t
t
. To access semaphore, CE = V
LZCE
LZCE
t
LZCE
IL
[22, 25, 26]
t
t
ACE
ABE
[22, 23, 24]
. This waveform cannot be used for semaphore reads.
t
LZOE
t
t
RC
ACE
t
RC
t
DOE
IH
, SEM = V
IL
DATA VALID
.
DATA VALID
t
OHA
t
t
t
OHA
HZCE
PD
CY7C024/0241
CY7C025/0251
t
t
t
HZOE
HZCE
HZCE
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