CY7C0241 CYPRESS [Cypress Semiconductor], CY7C0241 Datasheet - Page 9
![no-image](/images/no-image-200.jpg)
CY7C0241
Manufacturer Part Number
CY7C0241
Description
4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT, BUSY
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY7C0241.pdf
(21 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C0241-15AC
Manufacturer:
CY
Quantity:
85
Part Number:
CY7C0241-15AC
Manufacturer:
CYP
Quantity:
20 000
Company:
Part Number:
CY7C0241-15AXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Company:
Part Number:
CY7C0241-15AXCT
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Company:
Part Number:
CY7C0241-15AXI
Manufacturer:
Cypress Semiconductor Corp
Quantity:
135
Company:
Part Number:
CY7C0241-15AXI
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Company:
Part Number:
CY7C0241-25AXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
135
Company:
Part Number:
CY7C0241-25AXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Company:
Part Number:
CY7C0241-25AXCT
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Company:
Part Number:
CY7C0241AV-20AC
Manufacturer:
CY
Quantity:
1 677
Company:
Part Number:
CY7C0241AV-25AC
Manufacturer:
CY
Quantity:
1
Document #: 38-06035 Rev. *C
Switching Characteristics
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Notes:
13. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
14. To access RAM, CE=L, UB=L, SEM=H. To access semaphore, CE=H and SEM=L. Either condition must be valid for the entire t
15. At any given temperature and voltage condition for any given device, t
16. Test conditions used are Load 3.
17. This parameter is guaranteed but not tested.
18. For information on port-to-port delay through RAM cells from writing port to reading port, refer to Read Timing with Busy waveform.
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
ABE
WC
SCE
AW
HA
SA
PWE
SD
HD
HZWE
LZWE
WDD
DDD
Read Cycle
Write Cycle
Parameter
[17]
[17]
[14]
I
OI
[14]
[14]
[14]
[18]
[18]
/I
[15, 16, 17]
[15, 16, 17]
[15, 16, 17]
[15, 16, 17]
[16, 17]
[16, 17]
OH
and 30-pF load capacitance.
Read Cycle Time
Address to Data Valid
Output Hold From Address
Change
CE LOW to Data Valid
OE LOW to Data Valid
OE Low to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
Byte Enable Access Time
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold From Write
End
Address Set-up to Write Start
Write Pulse Width
Data Set-Up to Write End
Data Hold From Write End
R/W LOW to High Z
R/W HIGH to Low Z
Write Pulse to Data Delay
Write Data Valid to Read
Data Valid
Description
Over the Operating Range
7C024/0241–15
7C025/0251–15
Min.
15
15
12
12
12
10
3
3
3
0
0
0
0
0
Max.
15
15
10
10
10
15
15
10
30
25
HZCE
[13]
is less than t
7C024/0241–25
7C025/0251–25
Min.
25
25
20
20
20
15
3
3
3
0
0
0
0
0
LZCE
and t
Max.
25
25
13
15
15
25
25
15
50
35
HZOE
is less than t
7C024/0241–35
7C025/0251–35
Min.
35
35
30
30
25
15
0
3
3
3
0
0
0
0
LZOE
Max.
.
35
35
20
20
20
25
35
20
60
35
SCE
CY7C024/0241
CY7C025/0251
7C024/0241–55
7C025/0251–55
Min.
time.
55
55
35
35
35
20
3
3
3
0
0
0
0
0
Max.
Page 9 of 21
55
55
25
25
25
55
55
25
70
45
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns