MT46V16M8TG-8L MICRON [Micron Technology], MT46V16M8TG-8L Datasheet - Page 24
MT46V16M8TG-8L
Manufacturer Part Number
MT46V16M8TG-8L
Description
DOUBLE DATA RATE DDR SDRAM
Manufacturer
MICRON [Micron Technology]
Datasheet
1.MT46V16M8TG-8L.pdf
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128Mb: x4, x8, x16 DDR SDRAM
128Mx4x8x16DDR_C.p65 – Rev. C; Pub. 4/01
COMMAND
COMMAND
ADDRESS
ADDRESS
DQS
DQS
CK#
CK#
DM
DM
DQ
DQ
CK
CK
NOTE: 1. DO n = data-out from column n.
Bank a,
READ
Bank,
READ
2. DI b = data-in from column b.
3. Burst length = 4 in the cases shown (applies for bursts of 8 as well; if the burst length is 2,
4. One subsequent element of data-out appears in the programmed order following DO n.
5. Data-in elements are applied following DI b in the programmed order.
6. Shown with nominal
7. BST = BURST TERMINATE command, page remains open.
Col n
Col n
T0
T0
the BST command shown can be NOP).
CL = 2
CL = 2.5
BST
BST
T1
T1
7
7
t
AC,
READ to WRITE
t
DQSCK, and
Figure 12
NOP
NOP
T2
T2
24
DO
n
T2n
T2n
t
DQSQ.
DO
n
WRITE
Bank,
Col b
T3
T3
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
(MIN)
DQSS
DON’T CARE
128Mb: x4, x8, x16
WRITE
T4
T4
NOP
DI
b
t
(MIN)
TRANSITIONING DATA
DQSS
T4n
DDR SDRAM
PRELIMINARY
©2001, Micron Technology, Inc.
T5
T5
NOP
NOP
DI
b
T5n
T5n
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