M29F002BT STMICROELECTRONICS [STMicroelectronics], M29F002BT Datasheet - Page 4

• Manufacturer Part Number: M29F002BT
• Description: 2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

M29F002BT, M29F002BB, M29F002BNT, M29F002BNB
SIGNAL DESCRIPTIONS
See Figure 1, Logic Diagram, and Table 1, Signal
Names, for a brief overview of the signals connect-
ed to this device.
Address Inputs (A0-A17). The Address Inputs
select the cells in the memory array to access dur-
ing Bus Read operations. During Bus Write opera-
tions they control the commands sent to the
Command Interface of the internal state machine.
Data Inputs/Outputs (DQ0-DQ7). The Data In-
puts/Outputs output the data stored at the selected
address during a Bus Read operation. During Bus
Write operations they represent the commands
sent to the Command Interface of the internal state
machine.
Chip Enable (E). The Chip Enable, E, activates
the memory, allowing Bus Read and Bus Write op-
erations to be performed. When Chip Enable is
High, V
Output Enable (G). The Output Enable, G, con-
trols the Bus Read operation of the memory.
Write Enable (W). The Write Enable, W, controls
the Bus Write operation of the memory’s Com-
mand Interface.
Reset/Block Temporary Unprotect (RP). The Re-
set/Block Temporary Unprotect pin can be used to
apply a Hardware Reset to the memory or to tem-
porarily unprotect all blocks that have been pro-
tected. On the M29F002BNT the pin is not
connected internally and this feature is not avail-
able.
4/22
IH
, all other pins are ignored.
A Hardware Reset is achieved by holding Reset/
Block Temporary Unprotect Low, V
t
goes High, V
Read and Bus Write operations after t
or t
Figure 12, Reset/Temporary Unprotect AC Char-
acteristics for more details.
Holding RP at V
protected blocks in the memory. Program and
Erase operations on all blocks will be possible.
The transition from V
t
Reset/Block Temporary Unprotect can be left un-
connected. A weak internal pull-up resistor en-
sures that the memory always operates correctly.
V
supplies the power for all operations (Read, Pro-
gram, Erase etc.).
The Command Interface is disabled when the V
Supply Voltage is less than the Lockout Voltage,
V
cidentally damaging the data during power up,
power down and power surges. If the Program/
Erase Controller is programming or erasing during
this time then the operation aborts and the memo-
ry contents being altered will be invalid.
A 0.1µF capacitor should be connected between
the V
pin to decouple the current surges from the power
supply. The PCB track widths must be sufficient to
carry the currents required during program and
erase operations, I
V
all voltage measurements.
PLPX
PHPHH
CC
LKO
SS
PLYH
Ground. The V
Supply Voltage. The V
. This prevents Bus Write operations from ac-
. After Reset/Block Temporary Unprotect
CC
.
, whichever occurs last. See Table 15 and
Supply Voltage pin and the V
IH
, the memory will be ready for Bus
ID
CC4
will temporarily unprotect the
SS
IH
.
to V
Ground is the reference for
ID
must be slower than
CC
Supply Voltage
IL
, for at least
SS
Ground
PHEL
CC