CY7C133-25 CYPRESS [Cypress Semiconductor], CY7C133-25 Datasheet - Page 10

• Manufacturer Part Number: CY7C133-25
• Description: 2K x 16 Dual-Port Static RAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document #: 38-06036 Rev. *B
Switching Waveforms
Write Cycle No. 2 (R/W Three-States Data I/Os—Either Port)
Busy Timing Diagram No. 1 (CE Arbitration)
Note:
28. If the CE LOW transition occurs simultaneously with or after the R/W LOW transition, the outputs remain in the high-impedance state.
ADDRESS
ADDRESS
CE
ADDRESS
CE
DATA
DATA
L
R
Valid First:
Valid First:
OUT
BUSY
R/W
BUSY
CE
IN
CE
CE
CE
CE
L,R
L,R
R
R
L
R
L
L
(continued)
t
SA
t
t
PS
PS
t
SCE
ADDRESS MATCH
ADDRESS MATCH
t
AW
Either Port
t
HZWE
t
WC
t
t
BLC
BLC
[23, 28]
t
PWE
HIGH IMPEDANCE
t
DATA VALID
SD
t
t
BHC
BHC
t
HD
t
LZWE
t
HA
CY7C133
CY7C143
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