M29W400B STMICROELECTRONICS [STMicroelectronics], M29W400B Datasheet - Page 19
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M29W400B
Manufacturer Part Number
M29W400B
Description
4 Mbit 512Kb x8 or 256Kb x16, Boot Block Low Voltage Single Supply Flash Memory
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.M29W400B.pdf
(34 pages)
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Figure 7. Write AC Waveforms, W Controlled
Note: Address are latched on the falling edge of W, Data is latched on the rising edge of W.
During the executionof theerase by the P/E.C.,the
memory accepts only the Erase Suspend ES and
Read/Reset RD instructions. Data Polling bit DQ7
returns ’0’ while the erasure is in progress and ’1’
when it has completed. The Toggle bit DQ2 and
DQ6 toggle during the erase operation. They stop
when erase is completed. After completion the
Status Register bit DQ5 returns’1’ if there has been
an erase failure. In such a situation, the Toggle bit
DQ2 can be used to determine which block is not
correctly erased. In the case of erase failure, a
Read/Reset RD instruction is necessary in order to
reset the P/E.C.
Chip Erase(CE) Instruction. This instructionuses
six write cycles. The Erase Set-up command 80h
is written to address AAAAh in the Byte-wide con-
figuration or the address 5555h in the Word-wide
A0-A17/
A–1
E
G
W
DQ0-DQ7/
DQ8-DQ15
V CC
RB
tVCHEL
tELWL
tGHWL
tAVWL
tAVAV
VALID
tWLWH
configurationon the third cycle after the two Coded
cycles. The Chip Erase Confirm command 10h is
similarly written on the sixth cycle after another two
Coded cycles. If the second command given is not
an erase confirm or if the Coded cycles are wrong,
the instruction aborts and the device is reset to
Read Array. It is not necessaryto programthe array
with 00h first as the P/E.C. will automaticallydo this
before erasing it to FFh. Read operations after the
sixth rising edge of W or E output the Status
Register bits. During the execution of the erase by
the P/E.C., Data Polling bit DQ7 returns ’0’, then ’1’
on completion. The Toggle bits DQ2 and DQ6
toggle during erase operation and stop when erase
is completed. After completion the Status Register
bit DQ5 returns ’1’ if there has been an Erase
Failure.
tDVWH
tWHRL
VALID
tWLAX
tWHEH
tWHGL
M29W400T, M29W400B
tWHWL
tWHDX
AI01869C
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