CY7C1470V25-167AXI CYPRESS [Cypress Semiconductor], CY7C1470V25-167AXI Datasheet - Page 16
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CY7C1470V25-167AXI
Manufacturer Part Number
CY7C1470V25-167AXI
Description
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY7C1470V25-167AXI.pdf
(28 pages)
- Current page: 16 of 28
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Document #: 38-05290 Rev. *I
Boundary Scan Exit Order (1M x 72)
Bit #
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
209-Ball ID
M1
M2
A1
A2
B1
B2
C1
C2
D1
D2
E1
E2
G1
G2
H1
H2
N1
N2
P1
P2
R2
R1
F1
F2
L1
L2
J1
J2
Bit #
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
209-Ball ID
W11
W10
V11
V10
U11
W1
W2
W5
W6
W7
U1
U2
V1
V2
V3
V4
U4
V6
V5
U5
U6
V7
U7
V8
V9
T1
T2
T6
Bit #
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
209-Ball ID
M10
U10
R10
N10
M11
H10
G11
G10
D10
C10
T11
T10
R11
P11
P10
N11
L10
H11
F11
F10
E10
E11
D11
C11
L11
J11
J10
P6
CY7C1470V25
CY7C1472V25
CY7C1474V25
Bit #
100
101
102
103
104
105
106
107
108
109
110
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
Page 16 of 28
209-Ball ID
B11
B10
A11
A10
A7
A5
A9
U8
A6
D6
K6
B6
K3
A8
B4
B3
C3
C4
C8
C9
B9
B8
A4
C6
B7
A3
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