CY7C1480BV25-167AXI CYPRESS [Cypress Semiconductor], CY7C1480BV25-167AXI Datasheet - Page 11

• Manufacturer Part Number: CY7C1480BV25-167AXI
• Description: 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

Table 5. Truth Table for Read/Write
The read-write truth table for the CY7C1480BV25 follows.
Table 6. Truth Table for Read/Write
The read-write truth table for the CY7C1482BV25 follows.
Table 7. Truth Table for Read/Write
The read-write truth table for the CY7C1486BV25 follows.
Document #: 001-15143 Rev. *D
Read
Read
Write Byte A – (DQ
Write Byte B – (DQ
Write Bytes B, A
Write Byte C – (DQ
Write Bytes C, A
Write Bytes C, B
Write Bytes C, B, A
Write Byte D – (DQ
Write Bytes D, A
Write Bytes D, B
Write Bytes D, B, A
Write Bytes D, C
Write Bytes D, C, A
Write Bytes D, C, B
Write All Bytes
Write All Bytes
Read
Read
Write Byte A – (DQ
Write Byte B – (DQ
Write Bytes B, A
Write All Bytes
Write All Bytes
Read
Read
Write Byte x – (DQ
Write All Bytes
Write All Bytes
Note
8. BWx represents any byte write signal BW[0..7]. To enable any byte write BWx, a Logic LOW signal must be applied at clock rise. Any number of byte writes can be
enabled at the same time for a supplied write.
Function (CY7C1480BV25)
Function (CY7C1482BV25)
x
B
C
D
B
A
A
and DQP
and DQP
and DQP
and DQP
and DQP
and DQP
and DQP
Function (CY7C1486BV25)
x
B
D
)
A
C
A
B
)
)
)
)
)
)
GW
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
[5]
[5]
[8]
BWE
H
X
GW
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
L
CY7C1482BV25, CY7C1486BV25
GW
BW
H
H
H
H
L
H
H
H
H
H
H
H
H
X
L
L
L
L
L
X
L
L
L
D
BWE
H
X
L
L
L
L
L
BW
H
H
H
H
H
H
H
H
X
L
L
L
L
L
L
L
L
X
C
BWE
H
X
L
L
L
BW
CY7C1480BV25
X
H
H
X
L
L
L
B
BW
H
H
H
H
H
H
H
H
X
L
L
L
L
L
L
L
L
X
B
All BW = H
All BW = L
Page 11 of 31
BW
BW
X
L
X
H
H
BW
X
L
L
X
L
X
X
H
H
H
H
H
H
H
H
X
L
L
L
L
L
L
L
L
A
A
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