CY7C1480BV25-167AXI CYPRESS [Cypress Semiconductor], CY7C1480BV25-167AXI Datasheet - Page 25

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CY7C1480BV25-167AXI

Manufacturer Part Number
CY7C1480BV25-167AXI
Description
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Switching Waveforms
Timing for ZZ mode is shown in
Notes
Document #: 001-15143 Rev. *D
23. Device must be deselected when entering ZZ mode. See
24. DQs are in high-Z when exiting ZZ sleep mode.
ALL INPUTS
(except ZZ)
Outputs (Q)
I
SUPPLY
CLK
ZZ
(continued)
Figure
9.
t ZZI
[23, 24]
t ZZ
I DDZZ
“Truth Table” on page 10
Figure 9. ZZ Mode Timing
DON’T CARE
for all possible signal conditions to deselect the device.
High-Z
CY7C1482BV25, CY7C1486BV25
DESELECT or READ Only
t RZZI
t ZZREC
CY7C1480BV25
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