CY7C344 CYPRESS [Cypress Semiconductor], CY7C344 Datasheet

no-image

CY7C344

Manufacturer Part Number
CY7C344
Description
32-Macrocell MAX EPLD
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C344
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Part Number:
CY7C344-15HC
Manufacturer:
CYPRESS
Quantity:
1 795
Part Number:
CY7C344-15HI
Manufacturer:
CYP
Quantity:
1 016
Part Number:
CY7C344-15HMB
Manufacturer:
CYP
Quantity:
900
Part Number:
CY7C344-15JC
Manufacturer:
CYPRESS
Quantity:
334
Part Number:
CY7C344-15JC
Manufacturer:
CYP
Quantity:
5 510
Part Number:
CY7C344-15JC
Manufacturer:
CYP
Quantity:
865
Part Number:
CY7C344-15JC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Part Number:
CY7C344-15JI
Manufacturer:
CYP
Quantity:
865
Part Number:
CY7C344-15PC
Manufacturer:
CYP
Quantity:
5 510
Part Number:
CY7C344-15PC
Manufacturer:
FUJ
Quantity:
5 510
Part Number:
CY7C344-15PC
Manufacturer:
CYP
Quantity:
865
Part Number:
CY7C344-15PC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Cypress Semiconductor Corporation
Document #: 38-03006 Rev. **
Features
Functional Description
Available in a 28-pin, 300-mil DIP or windowed J-leaded ce-
ramic chip carrier (HLCC), the CY7C344 represents the dens-
est EPLD of this size. Eight dedicated inputs and 16 bidirec-
Selection Guide
Maximum Access Time (ns)
Maximum Operating Current
(mA)
Maximum Standby Current
(mA)
Note:
• High-performance, high-density replacement for TTL,
• 32 macrocells, 64 expander product terms in one LAB
• 8 dedicated inputs, 16 I/O pins
• 0.8-micron double-metal CMOS EPROM technology
• 28-pin, 300-mil DIP, cerDIP or 28-pin HLCC, PLCC
1.
Logic Block Diagram
74HC, and custom logic
package
15(22)
15(23)
27(6)
28(7)
Numbers in () refer to J-leaded packages.
INPUT
INPUT
INPUT
INPUT
MACROCELL 10
MACROCELL 12
MACROCELL 14
MACROCELL 16
MACROCELL 18
MACROCELL 20
MACROCELL 22
MACROCELL 24
MACROCELL 26
MACROCELL 28
MACROCELL 30
MACROCELL 32
MACROCELL 2
MACROCELL 4
MACROCELL 6
MACROCELL 8
64 EXPANDER PRODUCT TERM ARRAY
[ 1 ]
G
O
B
A
B
U
S
L
L
Commercial
Military
Industrial
Commercial
Military
Industrial
MACROCELL 11
MACROCELL 13
MACROCELL 15
MACROCELL 17
MACROCELL 19
MACROCELL 21
MACROCELL 23
MACROCELL 25
MACROCELL 27
MACROCELL 29
MACROCELL 31
MACROCELL 1
MACROCELL 3
MACROCELL 5
MACROCELL 7
MACROCELL 9
3901 North First Street
INPUT
INPUT/CLK 2(9)
INPUT
INPUT
32
13(20)
14(21)
1(8)
O
C
O
N
T
R
O
L
I
7C344-15
tional I/O pins communicate to one logic array block. In the
CY7C344 LAB there are 32 macrocells and 64 expander prod-
uct terms. When an I/O macrocell is used as an input, two
expanders are used to create an input path. Even if all of the
I/O pins are driven by macrocell registers, there are still 16
“buried” registers available. All inputs, macrocells, and I/O pins
are interconnected within the LAB.
The speed and density of the CY7C344 makes it a natural for
all types of applications. With just this one device, the designer
can implement complex state machines, registered logic, and
combinatorial “glue” logic, without using multiple chips. This
architectural flexibility allows the CY7C344 to replace multi-
chip TTL solutions, whether they are synchronous, asynchro-
nous, combinatorial, or all three.
200
220
150
170
15
C344–1
32-Macrocell MAX® EPLD
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
San Jose
10(17)
11(18)
12(19)
17(24)
18(25)
19(26)
20(27)
23(2)
24(3)
25(4)
26(5)
3(10)
4(11)
5(12)
6(13)
9(16)
INPUT/CLK
Pin Configurations
7C344-20
INPUT
INPUT
INPUT
200
220
220
150
170
170
20
I/O
I/O
I/O
INPUT/CLK
CA 95134
INPUT
INPUT
INPUT
5
6
7
8
9
10
11
GND
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
CC
12 13 14 1516 1718
4 3 2
Top View
CerDIP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Top View
HLCC
Revised July 18, 2000
1
28 27 26
28
27
26
25
24
23
22
21
20
19
18
17
16
15
CY7C344
7C344-25
408-943-2600
25
24
23
22
21
20
19
INPUT
INPUT
I/O
I/O
I/O
I/O
V
GND
I/O
I/O
I/O
I/O
INPUT
INPUT
200
220
220
150
170
170
CC
25
I/O
I/O
INPUT
INPUT
INPUT
INPUT
I/O
C344–2
C344–3

Related parts for CY7C344

CY7C344 Summary of contents

Page 1

... All inputs, macrocells, and I/O pins are interconnected within the LAB. The speed and density of the CY7C344 makes it a natural for all types of applications. With just this one device, the designer can implement complex state machines, registered logic, and combinatorial “ ...

Page 2

... R1 464 250 (b) C344–4 1.75V C344–6 = 5V. and t , which is used for part ( Test Load and Waveforms. All external timing ER XZ CY7C344 [2] .........................................–3.0V to +7.0V Ambient Temperature +70 C – +85 C – +125 C (Case) Min. Max. 2.4 0.45 2 –0.3 0.8 – ...

Page 3

... The parameter t vice when driving subsequent registered logic with a positive hold time and using the same clock as the CY7C344. In general greater than the minimum required input hold time of the subse- quent logic (synchronous or asynchronous), then the devices are ...

Page 4

... Mil Com’l/Ind Mil [4] Com’l /Ind Mil [4] Com’l /Ind Mil Com’l /Ind Mil [4, 13] Com’l /Ind Mil [4] ) Com’l/Ind MAX3 Mil CY7C344 7C344-15 7C344-20 7C344-25 Min. Max. Min. Max. Min ...

Page 5

... Document #: 38-03006 Rev. ** [7] Over Operating Range (continued) Description [4, 14 Com’l/Ind CO1 S Mil Com’l/Ind [4, 15] Mil Com’l/Ind [4, 16] ) CO1 Mil Com’l/Ind Mil Com’l/Ind Mil CY7C344 7C344-15 7C344-20 7C344-25 Min. Max. Min. Max. Min. 50.0 41.6 33.3 50.0 41.6 33.3 71.4 62.5 45.4 71.4 62.5 45.4 83.3 71.4 62 ...

Page 6

... Mil Com’l/Ind Mil should be used for both t AWH ), 1/( 1 also indicates the maximum frequency at which the device may operate in the asynchronously AWL AS AH ACO1 CY7C344 [7] 7C344-15 7C344-20 7C344-25 Min. Max. Min. Max. Min. Max ...

Page 7

... Com’l/Ind Mil Com’l/Ind Mil Com’l/Ind Mil Com’l/Ind Mil Com’l/Ind Mil Com’l/Ind Mil Com’l/Ind Mil Com’l/Ind Mil CY7C344 [7] 7C344-15 7C344-20 7C344-25 Min. Max. Min. Max. Min ...

Page 8

... Sample tested only for an output change of 500 mV. 28. This specification guarantees the maximum combinatorial delay associated with the macrocell register bypass when the macrocell is configured for combi- natorial operation. Document #: 38-03006 Rev. ** Over Operating Range Description Mil CY7C344 [7] (continued) 7C344-15 7C344-20 7C344-25 Min. ...

Page 9

... CO1 CO2 ACO1 AOH ACO2 CY7C344 HIGH-IMPEDANCE THREE-STATE VALID OUTPUT C344– AWH AWL C344–10 Page C344–9 ...

Page 10

... RSU DATA FROM LOGIC ARRAY Document #: 38-03006 Rev PIA EXP t AWL RSU LATCH FD t PIA ICS t RH CY7C344 LAC LAD C344– CLR PRE FD C344–12 C344–13 Page ...

Page 11

... OUTPUT PIN Ordering Information Speed (ns) Ordering Code 15 CY7C344-15HC/HI CY7C344-15JC/JI CY7C344-15PC/PI CY7C344-15WC/WI 20 CY7C344-20HC/HI CY7C344-20JC/JI CY7C344-20PC/PI CY7C344-20WC/WI CY7C344-20HMB CY7C344-20WMB 25 CY7C344-25HC/HI CY7C344-25JC/JI CY7C344-25PC/PI CY7C344-25WC/WI CY7C344-25HMB CY7C344-25WMB MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics Parameter Subgroups ...

Page 12

... Package Diagrams Document #: 38-03006 Rev. ** 28-Pin Windowed Leaded Chip Carrier H64 CY7C344 51-80077 Page ...

Page 13

... Package Diagrams (continued) Document #: 38-03006 Rev. ** 28-Lead Plastic Leaded Chip Carrier J64 28-Lead (300-Mil) Molded DIP P21 CY7C344 51-85001-A 51-85014-B Page ...

Page 14

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 28-Lead (300-Mil) Windowed CerDIP W22 MIL-STD-1835 D-15 Config. A CY7C344 51-80087 Page ...

Page 15

... Document Title: CY7C344 32-Macrocell MAX® EPLD Document Number: 38-03006 REV. ECN NO. Issue Date ** 106271 04/19/01 Document #: 38-03006 Rev. ** Orig. of Change Description of Change SZV Change from Spec number: 38-00127 to 38-03006 CY7C344 Page ...

Related keywords