MC14555 MOTOROLA [Motorola, Inc], MC14555 Datasheet - Page 4
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MC14555
Manufacturer Part Number
MC14555
Description
PCM Codec-Filter
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC14555.pdf
(20 pages)
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serial PCM word, clocked by BCLK X , out of D X . If the FS X
pulse is high for more than eight BCLK X periods, the D X and
TS X outputs will remain in a low–impedance state until FS X
is brought low. The length of the FS X pulse is used to deter-
mine whether the transmit and receive digital I/O conforms to
the Short Frame Sync or to the Long Frame Sync conven-
tion.
TS X
Transmit Time Slot Indicator
D X output is in a low–impedance state (i.e., during the trans-
mit time slot when the PCM word is being output) for en-
abling a PCM bus driver.
ANLB
Analog Loopback Control Input (MC145564/67 Only)
RC active filter to be disconnected from GS X and connected
to VPO + for analog loopback testing. This pin is held low in
normal operation.
ANALOG
GS X
Gain–Setting Transmit
er is internally connected to the encoder section of the
device. It must be used in conjunction with VF X I– and VF X I+
to set the transmit gain for a maximum signal amplitude of
2.5 V peak. This output can drive a 600
VF X I–
Voice–Frequency Transmit Input (Inverting)
operational amplifier.
VF X I+
Voice–Frequency Transmit Input
(Non–Inverting)
operational amplifier.
VF R O
Voice–Frequency Receive Output
load to 2.5 V peak.
VPI
Voltage Power Input (MC145564/67 Only)
fier. Both of the receive power amplifiers can be powered
down by connecting this input to V BB .
VPO–
Voltage Power Output (Inverted) (MC145564/67 Only)
fiers can drive 300
MC145554 MC145557 MC145564 MC145567
4
This is an open–drain output that goes low whenever the
When held high, this pin causes the input of the transmit
This output of the transmit gain–adjust operational amplifi-
This is the inverting input of the transmit gain–adjust
This is the non–inverting input of the transmit gain–adjust
This receive analog output is capable of driving a 600
This is the inverting input to the first receive power ampli-
This inverted output of the receive push–pull power ampli-
to 3.3 V peak.
load to 2.5 V peak.
VPO+
Voltage Power Output (Non–Inverted)
(MC145554/67 Only)
amplifier pair can drive 300
POWER SUPPLY
GNDA
Analog Ground
log and digital. It is 0 V.
V CC
Positive Power Supply
V BB
Negative Power Supply
ANALOG INTERFACE AND SIGNAL PATH
noise gain setting amplifier capable of driving a 600
Its output is fed to a three–pole anti–aliasing pre–filter. This
pre–filter incorporates a two–pole Butterworth active low–
pass filter, and a single passive pole. This pre–filter is fol-
lowed by a single ended–to–differential converter that is
clocked at 256 kHz. All subsequent analog processing uti-
lizes fully differential circuitry. The next section is a fully–dif-
ferential, five–pole switched capacitor low–pass filter with a
3.4 kHz passband. After this filter is a 3–pole switched–ca-
pacitor high–pass filter having a cutoff frequency of about
200 Hz. This high–pass stage has a transmission zero at dc
that eliminates any dc coming from the analog input or from
accumulated operational amplifier offsets in the preceding fil-
ter stages. The last stage of the high–pass filter is an auto-
zeroed sample and hold amplifier.
analog converter (DAC) are shared by the transmit and
receive sections. The autozeroed, switched–capacitor band-
gap reference generates precise positive and negative refer-
ence voltages that are independent of temperature and
power supply voltage. A binary–weighted capacitor array
(CDAC) forms the chords of the companding structure, while
a resistor string (RDAC) implements the linear steps within
each chord. The encode process uses the DAC, the voltage
reference, and a frame–by–frame autozeroed comparator to
implement a successive–approximation conversion algo-
rithm. All of the analog circuitry involved in the data con-
version — the voltage reference, RDAC, CDAC, and
comparator — are implemented with a differential architec-
ture.
sample and hold amplifier, a five–pole 3400 Hz switched
capacitor low–pass filter with sinX/X correction, and a two–
pole active smoothing filter to reduce the spectral com-
ponents of the switched capacitor filter. The output of the
smoothing filter is a power amplifier that is capable of driving
a 600
power amplifiers that are connected in a push–pull configu-
ration; two external resistors set the gain of both of the
This non–inverted output of the receive push–pull power
This terminal is the reference level for all signals, both ana-
V CC is typically 5 V.
V BB is typically – 5 V.
The transmit portion of these codec–filters includes a low–
One bandgap voltage reference generator and digital–to–
The receive section includes the DAC described above, a
load. The MC145564 and MC145567 add a pair of
FUNCTIONAL DESCRIPTION
to 3.3 V peak.
MOTOROLA
load.