PCF2119AU/2DA/2 NXP [NXP Semiconductors], PCF2119AU/2DA/2 Datasheet - Page 42
PCF2119AU/2DA/2
Manufacturer Part Number
PCF2119AU/2DA/2
Description
LCD controllers/drivers
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCF2119AU2DA2.pdf
(79 pages)
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PCF2119X_5
Product data sheet
11.2.1 I
11.2.2 I
One I
Before any data is transmitted on the I
addressed first. The addressing is always carried out with the first byte transmitted after
the START procedure.
The I
Figure 31
The slow down feature of the I
internal operations) is not used in the PCF2119x.
Definitions:
2
2
Fig 29. Acknowledgement on the I
Fig 30. PCF2119x I
•
•
•
•
•
C-bus protocol
C-bus definitions
Transmitter: the device which sends the data to the bus.
Receiver: the device which receives the data from the bus.
Master: the device which initiates a transfer, generates clock signals and terminates a
transfer.
Slave: the device addressed by a master.
Multi-master: more than one master can attempt to control the bus at the same time
without corrupting the message.
2
2
C-bus configuration for the different PCF2119x read and write cycles is shown in
C-bus slave address is reserved for the PCF2119x (see
by transmitter
data output
by receiver
data output
SCL from
to
master
Figure
33.
condition
2
START
C-bus slave address
Rev. 05 — 13 August 2009
S
2
C-bus protocol (receiver holds SCL line LOW during
1
2
0 1 1 1 0 1
C-bus
slave address
2
C-bus, the device which should respond is
2
013aaa143
S
A
0
R/W
0
not acknowledge
acknowledge
Figure
8
LCD controllers/drivers
PCF2119x
acknowledgement
clock pulse for
30).
© NXP B.V. 2009. All rights reserved.
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