CDP68HC68A2M96 INTERSIL [Intersil Corporation], CDP68HC68A2M96 Datasheet

CDP68HC68A2M96

Manufacturer Part Number

CDP68HC68A2M96

Description

CMOS Serial 10-Bit A/D Converter

Manufacturer

INTERSIL [Intersil Corporation]

Datasheet

1.CDP68HC68A2M96.pdf (15 pages)

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CMOS Serial 10-Bit A/D Converter

The CDP68HC68A2 is a CMOS 8-bit or 10-bit successive

approximation analog to digital converter (A/D) with a

standard Serial Peripheral Interface (SPI) bus and eight

multiplexed analog inputs. Voltage referencing is user

selectable to be relative to either V

(AI0). The analog inputs can range between V

The CDP68HC68A2 employs a switched capacitor,

successive approximation A/D conversion technique which

provides an inherent sample-and-hold function. An onchip

Schmitt oscillator provides the internal timing for the A/D

converter. The Schmitt input can be externally clocked or

connected to a single, external capacitor to form an RC

oscillator with a period of approximately 10-30ns per

picofarad.

Conversion times are proportional to the oscillator period. At

the maximum specified frequency of 1MHz, 10-bit

conversions take 14µs per channel. At the same frequency,

8-bit conversions consume 12µs per channel.

The versatile modes of the CDP68HC68A2 allow any

combination of the eight input channels to be enabled and

any one of the selected channels to be specified as the

“starting” channel. Conversions proceed sequentially

beginning with the starting channel. Nonselected channels

are skipped. Modes can be selected to: sequence from

channel to channel on command; sequence through

channels automatically, converting each channel one time;

or sequence repeatedly through all channels.

The results of 10-bit conversions are stored in 8-bit register

pairs (one pair per channel). The two most significant bits

are stored in the first register of each pair and the eight least

significant bits are stored in the second register of the pair.

To allow faster access, in the 8-bit mode, the results of

conversions are stored in a single register per channel.

A read-only STATUS register facilitates monitoring the

status of conversions. The STATUS register can simply be

polled or the INT pin can be enabled for interrupt driven

communications.

Ordering Information

CDP68HC68A2E

CDP68HC68A2M

CDP68HC68A2M96

PART NUMBER

TEMP. RANGE

-40 to 85

(

Data Sheet

16 Ld PDIP

20 Ld SOIC

Tape & Reel

PACKAGE

or analog channel 0

and V

E16.3

M20.3

PKG.

NO.

1-888-INTERSIL or 321-724-7143

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Features

• 10-Bit Resolution

• 8-Bit Mode for Single Data Byte Transfers

• SPI (Serial Peripheral Interface) Compatible

• Operates Ratiometrically Referencing V

• 14µs 10-Bit Conversion Time

• 8 Multiplexed Analog Input Channels

• Independent Channel Select

• Three Modes of Operation

• On Chip Oscillator

• Low Power CMOS Circuitry

• Intrinsic Sample and Hold

Pinouts

Source

AI0 / EXT. REF

Intersil (and design) is a registered trademark of Intersil Americas Inc.

April 2002

MISO

MOSI

MISO

MOSI

OSC

SCK

INT

CDP68HC68A2M (SOIC)

CDP68HC68A2E (PDIP)

TOP VIEW

CDP68HC68A2

AI1

AI2

AI3

AI4

AI5

AI6

AI7

AI1

AI2

AI3

AI4

AI5

AI6

AI7

or an External

FN1963.4

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