M48TMH1 STMICROELECTRONICS [STMicroelectronics], M48TMH1 Datasheet

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M48TMH1

Manufacturer Part Number
M48TMH1
Description
5V PC REAL TIME CLOCK
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
May 2000
DROP-IN REPLACEMENT for PC
COMPUTER CLOCK/CALENDAR
COUNTS SECONDS, MINUTES, HOURS,
DAYS, DAY of the WEEK, DATE, MONTH and
YEAR with LEAP YEAR COMPENSATION
INTERFACED WITH SOFTWARE AS 128
RAM LOCATIONS:
– 14 Bytes of Clock and Control Registers
– 114 Bytes of General Purpose RAM
SELECTABLE BUS TIMING (Intel/Motorola)
THREE INTERRUPTS are SEPARATELY
SOFTWARE-MASKABLE and TESTABLE
– Time-of-Day Alarm (Once/Second to
– Periodic Rates from 122µs to 500ms
– End-of-Clock Update Cycle
PROGRAMMABLE SQUARE WAVE OUTPUT
SELF-CONTAINED BATTERY and CRYSTAL
in the CAPHAT DIP PACKAGE
PACKAGING INCLUDES a 28-LEAD SOIC
and SNAPHAT
(to be Ordered Separately)
SOIC PACKAGE PROVIDES DIRECT
CONNECTION for a SNAPHAT TOP
CONTAINS the BATTERY and CRYSTAL
PIN and FUNCTION COMPATIBLE with
bq3285/7A and DS128887
Once/Day)
®
TOP
Figure 1. Logic Diagram
28
AD0-AD7
SNAPHAT (SH)
5V PC REAL TIME CLOCK
Battery/Crystal
SOH28 (MH)
MOT
RST
RCL
R/W
DS
1
AS
E
8
V CC
V SS
M48T86
24
Battery/Crystal
PCDIP24 (PC)
1
M48T86
CAPHAT
SQW
IRQ
AI01640
1/23

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M48TMH1 Summary of contents

Page 1

DROP-IN REPLACEMENT for PC COMPUTER CLOCK/CALENDAR COUNTS SECONDS, MINUTES, HOURS, DAYS, DAY of the WEEK, DATE, MONTH and YEAR with LEAP YEAR COMPENSATION INTERFACED WITH SOFTWARE AS 128 RAM LOCATIONS: – 14 Bytes of Clock and Control Registers – 114 ...

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M48T86 Figure 2. DIP Connections MOT AD0 4 AD1 5 AD2 6 M48T86 AD3 7 AD4 8 AD5 9 AD6 10 AD7 AI01641 Table 1. Signal Names AD0-AD7 Multiplexed Address/Data Bus ...

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Table 2. Absolute Maximum Ratings Symbol T Ambient Operating Temperature A T Storage Temperature (V STG (2) Lead Solder Temperature for 10 seconds T SLD V Input or Output Voltages IO V Supply Voltage CC P Power Dissipation D Note: ...

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M48T86 Figure 4. Block Diagram OSCILLATOR E POWER V CC SWITCH AND V CC POK WRITE V BAT PROTECT DS R/W BUS INTERFACE AS AD0-AD7 DS (Data Strobe Input). The DS pin is also re- ferred to as Read (RD). ...

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RST (Reset Input). The M48T86 is reset when the RST input is pulled low. With a valid V plied and a low on RST, the following events oc- cur: 1. Periodic Interrupt Enable (PIE) bit is cleared to a zero. ...

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M48T86 Table 3. Time, Calendar and Alarm Formats Address RTC Bytes 0 Seconds 1 Seconds Alarm 2 Minutes 3 Minutes Alarm Hours, 12-hrs 4 Hours, 24-hrs Hours Alarm, 12-hrs 5 Hours Alarm, 24-hrs 6 Day of Week (1 = Sun) ...

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Figure 5. AC Testing Load Circuit FOR ALL OUTPUTS EXCEPT IRQ 510 Table 4. AC Measurement Conditions Input Rise and Fall Times Input Pulse Voltages Input and Output Timing Ref. Voltages Note that Output Hi-Z is defined as the point ...

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M48T86 Table 7. Power Down/Up Trip Points DC Characteristics ( °C) A Symbol V Power-fail Deselect Voltage PFD V Battery Back-up Switchover Voltage SO (2) Expected Data Retention Time t DR Note: 1. All voltages referenced ...

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Table 9. AC Characteristics ( ° 4.5V to 5.5V Symbol t Cycle Time CYC t Pulse Width, Data Strobe Low or R/W High DSL t Pulse Width, Data Strobe High or R/W ...

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M48T86 Figure 8. Intel Bus Read Mode AC Waveforms AS DS R/W tDAS E AD0-AD7 Figure 9. Intel Bus Write AC Waveforms AS tDAS DS R/W E AD0-AD7 10/23 tCYC tASW tASD tDSL tDSH tCS tOD tAS tAH tCYC tASW ...

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Figure 10. Motorola Bus Read/Write Mode AC Waveforms AS tDAS DS R/W E AD0-AD7 (Write) AD0-AD7 (Read) PERIODIC INTERRUPT The periodic interrupt will cause the IRQ pin active state from once every 500ms to once every ...

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M48T86 Figure 11. Address Map 0 14 CLOCK AND CONTROL BYTES STATUS REGISTERS 13 14 114 STORAGE REGISTERS BYTES 127 UPDATE CYCLE INTERRUPT After each update cycle, the update cycle ended flag bit (UF) (Register C; Bit 4) is set ...

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Table 10. Square Wave Frequency/Periodic Interrupt Rate Register A Bits RS3 RS2 ...

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M48T86 Figure 12. Update Period Timing and UIP UIP Figure 13. Update-ended/Periodic Interrupt Relationship UIP tPI PF UF 14/23 UPDATE PERIOD (1sec) UPDATE PERIOD (1sec) tPI tPI tBUC tUC AI01651 tBUC tUC AI01652B ...

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REGISTER A MSB BIT7 BIT6 UIP OSC2 UIP. Update in Progress The Update in Progress (UIP) bit is a status flag that can be monitored. When the UIP bit is one, the update transfer will soon occur. When UIP isa ...

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M48T86 REGISTER B MSB BIT7 BIT6 SET PIE SET When the SET bit is a zero, the update transfer functions normally by advancing the counts once per second. When the SET bit is written to a one, any update transfer ...

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REGISTER C MSB BIT7 BIT6 IRQF PF IRQF. Interrupt Request Flag The Interrupt Request Flag (IRQF) bit is set to a one when one or more of the following are true PIE = AIE = ...

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M48T86 POWER SUPPLY DECOUPLING and UNDERSHOOT PROTECTION I transients, including those produced by output CC switching, can produce voltage fluctuations, re- sulting in spikes on the V bus. These transients CC can be reduced if capacitors are used to store ...

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Table 11. Ordering Information Scheme Example: Device Type M48T Package PC = PCDIP24 ( SOH28 Temperature Range °C Shipping Method for SOIC blank = Tubes TR = Tape & Reel Note: 1. The ...

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M48T86 Table 13. PCDIP24 - 24 pin Plastic DIP, battery CAPHAT, Package Mechanical Data Symb Typ Figure 15. PCDIP28 - 28 pin Plastic DIP, battery CAPHAT, Package ...

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Table 14. SOH28 - 28 lead Plastic Small Outline, 4-socket battery SNAPHAT, Package Mechanical Data Symb Typ 1. Figure 16. SOH28 - 28 lead Plastic Small Outline, ...

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M48T86 Table 15. M4T28-BR12SH - SNAPHAT Housing for 48 mAh Battery & Crystal, Package Mechanical Data Symb Typ Figure 17. M4T28-BR12SH - SNAPHAT Housing for 48 mAh Battery & Crystal, ...

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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. ...

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