STLC3075_09 STMICROELECTRONICS [STMicroelectronics], STLC3075_09 Datasheet

no-image

STLC3075_09

Manufacturer Part Number
STLC3075_09
Description
Integrated POTS interface for home access gateway and WLL
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Features
Description
The STLC3075 is a SLIC device specifically
designed for WLL (Wireless Local Loop), and
ISDN terminal adaptors and VoIP applications.
One distinctive characteristic of this device is its
ability to operate with a single supply voltage
(from +4.5 V to +12 V) and to self generate the
negative battery by means of an on-chip DC/DC
converter controller that drives an external MOS
switch.
March 2009
Monochip SLIC optimized for WLL & VoIP
applications
Implements all Borsht function key features
Single supply (4.5 V to 12 V) for fly-back
configuration
Single supply (5.5 V to 12 V) for buck-boost
configuration
Built in DC/DC converter controller
Soft battery reversal with programmable
transition time
On-hook transmission
Programmable off-hook detector threshold
Metering pulse generation and filter
Integrated ringing
Integrated ring trip
Parallel control interface (3.3 V logic level)
Programmable constant current feed
Surface mount package
Integrated thermal protection
Dual gain value option
Automatic recognition flyback and buckboost
configuration
BCDIIIS 90V technology
-40 °C to +85 °C operating range
for home access gateway and WLL
Rev 8
The battery level is properly adjusted depending
on the operating mode. A useful characteristic for
these applications is the integrated ringing
generator.
The control interface is parallel with open drain
output and 3.3 V logic levels.
The metering pulses are generated on-chip
starting from two logic signals (0 and 3.3 V): one
signal defining the metering pulse frequency, the
other signal defining the metering pulse duration.
An on-chip circuit then provides the proper
shaping and filtering. Metering pulse amplitude
and shaping (rising and decay time) can be
programmed by external components.
A dedicated cancellation circuit avoids possible
codec input saturation due to metering pulse
echo.
Constant current feed can be set from 20 mA to
40 mA. Off-hook detection threshold is
programmable from 5 mA to 9 mA.
The device, which is developed in BCDIIIS
technology (90 V process), operates in the
extended temperature range and integrates a
thermal protection that sets the device in power
down when T
Table 1.
1. ECOPACK® (see
E-STLC3075
Order code
Integrated POTS interface
Device summary
(1)
j
exceeds 140 °C.
Section
Package
LQFP44
LQFP44
9)
STLC3075
Packing
Tray
www.st.com
1/36
1

Related parts for STLC3075_09

STLC3075_09 Summary of contents

Page 1

Features ■ Monochip SLIC optimized for WLL & VoIP applications ■ Implements all Borsht function key features ■ Single supply (4 for fly-back configuration ■ Single supply (5 for buck-boost configuration ■ ...

Page 2

Contents Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 3

STLC3075 List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 4

List of figures List of figures Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 5

STLC3075 1 Block diagram Figure 1. Block diagram GAIN SETTING TX RX ZAC1 ZAC RS ZB CKTTX CTTX1 CTTX2 FTTX INPUT LOGIC AND DECODER Status and functions SUPERVISION AC PROC TTX PROC REFERENCE RTTX CAC ILTF ...

Page 6

Pin description 2 Pin description Figure 2. Pin connection (top view) GAIN SET Table 2. Pin description N° Pin 1 D0 Control interface: input bit Control interface: input bit Control interface: input bit 2 ...

Page 7

STLC3075 Table 2. Pin description (continued) N° Pin 16 RS Protection resistors image (the image resistor is connected from this node to ZAC) Balance network for wire conversion (the balance impedance ZB is connected 17 ZB from ...

Page 8

Electrical specification 3 Electrical specification 3.1 Absolute maximum rating Table 3. Absolute maximum ratings Symbol V Positive supply voltage POS A/BGND AGND to BGND V Pin D0, D1, D2, DET, CKTTX dig T Max. junction temperature j Vbtot=|V (1) V ...

Page 9

STLC3075 4 Functional description The STLC3075 is a device specifically developed for WLL VoIP and ISDN-TA applications based on a SLIC core, on purpose optimized for these applications, with the addition of a DC/DC converter controller to meet ...

Page 10

Functional description The self generated battery voltage is set to a predefined value in on-hook state. The typical value of -50 V can be adjusted via one external resistor (RF1). When RING mode is selected this typical value is increased ...

Page 11

STLC3075 4.2.3 Active DC characteristics & supervision When this mode is selected the STLC3075 provides both DC feeding and AC transmission. The STLC3075 feeds the line with a constant current fixed by RLIM ( range). The ...

Page 12

Functional description AC characteristics The SLIC provides the standard SLIC transmission functions. Once in active mode the SLIC can operate with two different Tx, Rx gains set by the gain set control bit (See Table 7 Table 7. Gain set ...

Page 13

STLC3075 Metering pulse injection (TTX) The metering pulses circuit consists of a burst shaping generator that generates a square shaped wave and a low pass filter to reduce the harmonic distortion of the output signal. The metering pulse is obtained ...

Page 14

Functional description and ideal TTX echo cancellation), the metering pulse level on the line equals 1.33 or 2.66 times the level applied to the RTTX pin. As already mentioned the metering pulse echo cancellation is obtained by means of two ...

Page 15

STLC3075 Once the ring trip is detected, the DET output is activated (logic level low). At this point the card controller or a simple logic circuit stops the D2 toggling in order to effectively disconnect the ring signal and then ...

Page 16

Application information 5 Application information 5.1 Layout recommendation A properly designed PCB layout is a basic issue to guarantee a correct behavior and good noise performance. Particular care must be taken on the ground connection. Using the configurations shown on ...

Page 17

STLC3075 Table 10. External components for buckboost configuration Name Function RRX Rx input bias resistor RREF Bias setting current CSVR Negative battery filter Ring trip threshold setting RD resistor CAC AC/DC split capacitance RP Line protection resistor RLIM Current limiting ...

Page 18

Application information 1. CV should be defined depending on the power supply current capability and maximum allowable ripple POS 2. For low ripple application use 2x47m F in parallel. 3. Can be saved if proper PCB layout avoid noise coupling ...

Page 19

STLC3075 Table 12. External components for flyback configuration Name Function RRX Rx input bias resistor RREF Bias setting current CSVR Negative battery filter Ring trip threshold setting RD resistor CAC AC/DC split capacitance RP Line protection resistor RLIM Current limiting ...

Page 20

Application information Table 12. External components for flyback configuration Name Function T1 DC/DC converter transformer Negative battery RF1 programming level Negative battery RF2 programming level 1. CV should be defined depending on the power supply current capability and maximum allowable ...

Page 21

STLC3075 Table 15. External components @gain set = 0 Name Function RS Protection resistance image ZAC Two wire AC impedance SLIC impedance balancing (1) ZA network Line impedance balancing (1) ZB network AC feedback loop CCOMP compensation Trans-hybrid Loss frequency ...

Page 22

Application information Table 16. External components @gain set = 1 Name Function RS Protection resistance image ZAC Two wire AC impedance SLIC impedance balancing (1) ZA network Line impedance balancing (1) ZB network AC feedback loop CCOMP compensation Trans-hybrid Loss ...

Page 23

STLC3075 Figure 8. Application diagram with N-channel DET CONTROL D0 INTERFACE TTX CLOCK SYSTEM GND SUGGESTED GROUND LAY-OUT Figure 9. Application diagram without metering pulse generation with N-channel CCOMP DET CONTROL D0 INTERFACE SYSTEM ...

Page 24

Application information Figure 10. Application diagram with P-channel DET CONTROL D0 INTERFACE TTX CLOCK SYSTEM GND SUGGESTED GROUND LAY-OUT Figure 11. Application diagram without metering pulse generation DET CONTROL D0 INTERFACE SYSTEM GND SUGGESTED ...

Page 25

STLC3075 6 Electrical characteristics Test conditions: V External components as listed in the ’typical values’ column of the above external components tables. Note: Testing of all parameters is performed at 25°C. Characterization as well as design rules used allow correlation ...

Page 26

Electrical characteristics Table 17. Electrical characteristics (continued) Symbol Parameter THL Trans-hybrid loss Ovl 2W overload level TXoff TX output offset G24 Transmit gain abs. G42 Receive gain abs. G24f TX gain variation vs. frequency G24f RX gain variation vs. freq. ...

Page 27

STLC3075 Table 17. Electrical characteristics (continued) Symbol Parameter Vring Line voltage Detectors IOFFTHA Off/hook current threshold ROFTHA Off/hook loop resistance threshold IONTHA On/hook current threshold RONTHA On/hook loop resistance threshold IOFFTHI Off/hook current threshold ROFFTHI Off/hook loop resistance threshold IONTHI ...

Page 28

Electrical characteristics Table 17. Electrical characteristics (continued) Symbol Parameter PSRR and power consumption Power supply rejection V PSERRC 2W port Ivpos V supply current @ POS (1) Ipk Peak current limiting accuracy 1. Buck-Boost configuration 6.1 Test ...

Page 29

STLC3075 Figure 13. THL trans hybrid loss THL = 20Log|Vrx/Vtx/ 600ohm Figure 14. G24 transmit gain G24 = 20Log|2Vtx/E| Figure 15. G42 receive gain G42 = 20Log|VI/Vrx| W&G GH1 TIP 100µF 100mA DC mac Zin = 100K 200 to 6kHz ...

Page 30

Electrical characteristics Figure 16. PSRRC power supply rejection V Figure 17. L/T longitudinal to transversal conversion L/T = 20Log|Vcm/Vl| Vcm Figure 18. T/L transversal to longitudinal conversion T/L = 20Log|Vrx/Vcm| 600ohm 30/36 POS W&G GH1 100μF Vl 100mA DC max ...

Page 31

STLC3075 Figure 19. VTTX metering pulse level on line Figure 20. V2Wp and W4Wp: Idle channel sophometric noise at line and TX. V2Wp = 20Log|Vl/0.774l|; V4Wp = 20Log|Vtx/0.774l| Vl psophometric filtered TIP STLC3075 Vlttx application 200ohm circuit RING CKTTX fttx ...

Page 32

Over voltage protection 7 Over voltage protection Figure 21. Simplified configuration for indoor over voltage protection Figure 22. Standard over voltage protection configuration for K20 compliance 32/36 STPR120A BGND STLC3075 RP1 RP2 TIP RP1 RP2 RING VBAT STPR120A RP1 = ...

Page 33

STLC3075 8 Typical state diagram Figure 23. Typical state diagram for STLC3075 operation Tj>Tth PD=1, D0=D1=0 On Hook Condition Note: all state transitions are under the microprocessor control. Normally used for On Hook Transmission PD=0, D0=D1=0 Power Down Ring Burst ...

Page 34

Package information 9 Package information In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ...

Page 35

STLC3075 10 Revision history Table 18. Document revision history Date 04-Oct-2004 04-Nov-2004 09-Feb-2005 22-Apr-2005 14-Jul-2005 07-Feb-2007 09-Mar-2007 10-Mar-2009 Revision 1 Initial release Removed all max. values of the ‘Line voltage’ parameter on page 16/26. 2 Changed the unit from mA ...

Page 36

Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any ...

Related keywords