AD6640PCB AD [Analog Devices], AD6640PCB Datasheet - Page 11

• Manufacturer Part Number: AD6640PCB
• Description: 12-Bit, 65 MSPS IF Sampling A/D Converter
• Manufacturer: AD [Analog Devices]

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THEORY OF OPERATION
The AD6640 analog-to-digital converter (ADC) employs a two-
stage subrange architecture. This design approach ensures
12-bit accuracy, without the need for laser trim, at low power.
As shown in the functional block diagram, the AD6640 has
complementary analog input pins, AIN and AIN. Each analog
input is centered at 2.4 volts and should swing 0.5 volts
around this reference (ref. Figure 2). Since AIN and AIN are
180 degrees out of phase, the differential analog input signal is
2 volts peak-to-peak.
Both analog inputs are buffered prior to the first track-and-hold,
TH1. The high state of the ENCODE pulse places TH1 in
hold mode. The held value of TH1 is applied to the input of a
6-bit coarse ADC. The digital output of the coarse ADC drives
a 6-bit DAC; the DAC is 12 bits accurate. The output of the 6-
bit DAC is subtracted from the delayed analog signal at the
input of TH3 to generate a residue signal. TH2 is used as an
analog pipeline to null out the digital delay of the coarse ADC.
The 6-bit coarse ADC word and 7-bit residue word are added
together and corrected in the digital error correction logic to
generate the output word. The result is a 12-bit parallel digital
CMOS-compatible word, coded as twos complement.
APPLYING THE AD6640
Encoding the AD6640
Best performance is obtained by driving the encode pins dif-
ferentially. However, the AD6640 is also designed to interface
with TTL and CMOS logic families. The source used to drive
the ENCODE pin(s) must be clean and free from jitter. Sources
with excessive jitter will limit SNR (reference Equation 1 under
“Noise Floor and SNR”).
The AD6640 encode inputs are connected to a differential input
stage (see Figure 3 under EQUIVALENT CIRCUITS). With
no input signal connected to either ENCODE pin, the voltage
dividers bias the inputs to 1.6 volts. For TTL or CMOS usage,
the encode source should be connected to ENCODE, Pin 3.
ENCODE should be decoupled using a low inductance or mi-
crowave chip capacitor to ground.
If a logic threshold other than the nominal 1.6 V is required, the
following equations show how to use an external resistor, Rx, to
raise or lower the trip point (see Figure 3; R1 = 17 k , R2 = 8 k ).
V
l
Figure 25. Single-Ended TTL /CMOS Encode
R1R2 R1Rx R2Rx
TTL OR CMOS
5R2Rx
SOURCE
0.01 F
to lower logic threshold.
ENCODE
ENCODE
AD6640
–11–
While the single-ended encode will work well for many applica-
tions, driving the encode differentially will provide increased
performance. Depending on circuit layout and system noise, a
1 dB to 3 dB improvement in SNR can be realized. It is not
recommended that differential TTL logic be used however,
because most TTL families that support complementary outputs
are not delay or slew rate matched. Instead, it is recommended
that the encode signal be ac-coupled into the ENCODE and
ENCODE pins.
The simplest option is shown below. The low jitter TTL signal
is coupled with a limiting resistor, typically 100 ohms, to the
primary side of an RF transformer (these transformers are inex-
pensive and readily available; part number in Figure 28 is from
Mini-Circuits). The secondary side is connected to the EN-
CODE and ENCODE pins of the converter. Since both encode
inputs are self-biased, no additional components are required.
A clean sine wave may be substituted for a TTL clock. In this
case, the matching network is shown below. Select a transformer
ratio to match source and load impedances. The input impedance
of the AD6640 encode is approximately 11 k
Therefore “R,” shown in the Figure 29, may be any value that is
convenient for available drive power.
V
l
Figure 26. Lower Logic Threshold for Encode
Figure 27. Raise Logic Threshold for Encode
Figure 28. TTL Source – Differential Encode
R2
TTL
0.01 F
5R2
ENCODE
SOURCE
ENCODE
SOURCE
R1 R
100
R1R
0.01 F
X
0.1 F
X
RX
RX
V
AV
l
to raise logic threshold.
V
T1–1T
CC
l
ENCODE
ENCODE
ENCODE
ENCODE
AD6640
AD6640
ENCODE
ENCODE
+5V
+5V
AD6640
R1
R2
R2
R1
AD6640
differentially.