AD6640PCB AD [Analog Devices], AD6640PCB Datasheet - Page 3

• Manufacturer Part Number: AD6640PCB
• Description: 12-Bit, 65 MSPS IF Sampling A/D Converter
• Manufacturer: AD [Analog Devices]

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AC SPECIFICATIONS
Parameter (Conditions)
SNR
SINAD
Worst Harmonic
Worst Harmonic
Multitone SFDR (w/Dither)
Two-Tone IMD Rejection
Analog Input Bandwidth
NOTES
1
2
3
4
5
Specifications subject to change without notice.
SWITCHING SPECIFICATIONS
Parameter (Conditions)
Maximum Conversion Rate
Minimum Conversion Rate
Aperture Delay (t
Aperture Uncertainty (Jitter)
ENCODE Pulsewidth High
ENCODE Pulsewidth Low
Output Delay (t
NOTES
1
2
3
4
Specifications subject to change without notice.
All ac specifications tested by driving ENCODE and ENCODE differentially.
For a single test tone at –1 dBFS, the worst case spectral performance is typically limited by the direct or aliased 2nd or 3rd harmonic. If a system is designed such
See Overcoming Static Nonlinearities with Dither section for details on improving SFDR performance. To measure SFDR, eight tones from 14 MHz to 18 MHz
F1 = 14.9 MHz, F2 = 16 MHz.
Specification is small signal bandwidth. Plots of Performance versus Analog Input Frequency are shown in Figures 10, 11 and 12. Sampling wide bandwidths
that the 2nd and 3rd harmonics fall out-of-band, overall performance in the band of interest is typically improved by 5 dB. Worst Harmonic (4th or Higher) includes
4th and higher order harmonics and all other spurious components. Reference Figure 12 for more detail.
(0.5 MHz spacing) are swept from –20 dBFS to –90 dBFS. An open channel at 16 MHz is used to monitor SFDR.
(5 MHz–15 MHz) should be limited to 70 MHz center frequency.
All switching specifications tested by driving ENCODE and ENCODE differentially.
A plot of Performance vs. Encode is shown in Figure 16 under Typical Performance Characteristics.
A plot of Performance vs. Duty Cycle (Encode = 65 MSPS) is shown in Figure 17 under Typical Performance Characteristics.
Outputs driving one LCX gate. Delay is measured from differential crossing of ENC, ENC to the time when all output data bits are within valid logic levels.
Analog Input
@ –1 dBFS
Analog Input
@ –1 dBFS
Analog Input
@ –1 dBFS
Analog Input
@ –1 dBFS
Eight Tones @ –20 dBFS
F1, F2 @ –7 dBFS
OD
2
2
A
2.2 MHz
15.5 MHz
31.0 MHz
69.0 MHz
2.2 MHz
15.5 MHz
31.0 MHz
69.0 MHz
(2nd or 3rd)
2.2 MHz
15.5 MHz
31.0 MHz
69.0 MHz
(4th or Higher)
2.2 MHz
15.5 MHz
31.0 MHz
69.0 MHz
) DV
)
CC
5
4
+3.3 V/5.0 V
2
3
3
1
(AV
CC
= +5 V, DV
4
1
(AV
CC
CC
Temp
+25 C
+25 C
+25 C
+25 C
+25 C
+25 C
+25 C
+25 C
+25 C
+25 C
+25 C
+25 C
+25 C
+25 C
+25 C
+25 C
Full
Full
+25 C
Temp
Full
Full
+25 C
+25 C
+25 C
+25 C
Full
= +3.3 V; ENCODE & ENCODE = 65 MSPS; T
= +5 V, DV
CC
= +3.3 V; ENCODE & ENCODE = 65 MSPS; T
–3–
Test
Level
V
I
V
V
V
I
V
V
V
I
V
V
V
I
V
V
V
V
V
Test
Level
VI
IV
V
V
IV
IV
IV
Min
64
63.5
74
74
Min
65
6.5
6.5
8.5
MIN
= –40 C, T
AD6640AST
AD6640AST
Typ
68
67.7
67.5
66
68
67.2
67.0
65.5
80
80
79.5
78.5
85
85
85
84
90
80
300
Typ
400
0.3
10.5
MAX
MIN
= +85 C)
= –40 C, T
Max
Max
6.5
12.5
MAX
AD6640
= +85 C)
Units
dB
dB
dB
dB
dB
dB
dB
dB
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBFS
dBc
MHz
Units
MSPS
MSPS
ps
ps rms
ns
ns
ns