AT84AD001BCTD ATMEL [ATMEL Corporation], AT84AD001BCTD Datasheet - Page 11
AT84AD001BCTD
Manufacturer Part Number
AT84AD001BCTD
Description
Dual 8-bit 1 Gsps ADC
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT84AD001BCTD.pdf
(60 pages)
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Table 7. Switching Performances
2153C–BDC–04/04
Parameter
Switching Performance and Characteristics - See “Timing Diagrams” on page 12.
Maximum operating clock frequency
Maximum operating clock frequency in BIT and
decimation modes
Minimum clock frequency (no transparent mode)
Minimum clock frequency (with transparent mode)
Minimum clock pulse width [high]
(No transparent mode)
Minimum clock pulse width [low]
(No transparent mode)
Aperture delay: nominal mode with ISA & FiSDA
Aperture uncertainty
Data output delay between input clock and data
Data Ready Output Delay
Data Ready Reset to Data Ready
Data Output Delay with Data Ready
Data Ready (CLKO) Delay Adjust (140 ps steps)
Output skew
Output rise/fall time for DATA (20% - 80%)
Output rise/fall time for DATA READY (20% - 80%)
Data pipeline delay (nominal mode)
Data pipeline delay (nominal mode) in S/H
transparent mode
DDRB recommended pulse width
Tdrda range
(BIT, DEC)
Symbol
TRDR
TR/TF
TR/TF
Jitter
TDO
TDR
TPD
TC1
TC2
TD2
TA
F
F
F
S
S
S
Min
300
300
0.4
0.4
50
1
1
3.5 (port A, 1:1 DMUX mode)
3.5 (port A, 1:2 DMUX mode)
4 (port A, 1:2 DMUX mode)
3 (port A, 1:1 DMUX mode)
-560 to 420
2.5 (port B)
3 (port B)
+Tdrda
1/2 Fs
Typ
350
350
0.5
0.5
0.4
3.8
10
1
1
3
2
AT84AD001B
Max
100
500
750
500
50
50
Clock cycles
ps (rms)
Msps
Msps
Gsps
Ksps
Unit
ns
ns
ns
ns
ns
ns
ps
ps
ps
ps
ps
ns
11
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