XA2C256-7TQG10I XILINX [Xilinx, Inc], XA2C256-7TQG10I Datasheet - Page 2

• Manufacturer Part Number: XA2C256-7TQG10I
• Description: CoolRunner-II Automotive CPLD
• Manufacturer: XILINX [Xilinx, Inc]

XA2C256 CoolRunner-II Automotive CPLD
The use of the clock divide (division by 2) and DualEDGE
flip-flop gives the resultant CoolCLOCK feature.
DataGATE is a method to selectively disable inputs of the
CPLD that are not of interest during certain points in time.
By mapping a signal to the DataGATE function, lower power
can be achieved due to reduction in signal switching.
Another feature that eases voltage translation is I/O bank-
ing. Two I/O banks are available on the CoolRunner-II Auto-
motive 256-macrocell device that permit easy interfacing to
3.3V, 2.5V, 1.8V, and 1.5V devices.
The CoolRunner-II Automotive 256-macrocell CPLD is I/O
compatible with various I/O standards (see
device is also 1.5V I/O compatible with the use of
Schmitt-trigger inputs.
RealDigital Design Technology
Xilinx CoolRunner-II Automotive CPLDs are fabricated on a
0.18 micron process technology which is derived from lead-
ing edge FPGA product development. CoolRunner-II Auto-
motive CPLDs employ RealDigital, a design technique that
makes use of CMOS technology in both the fabrication and
design
employs a cascade of CMOS gates to implement sum of
products instead of traditional sense amplifier methodology.
Table 2: I
2
Notes:
1.
Typical I
16-bit up/down, resettable binary counter (one counter per function block).
methodology.
CC
CC
(mA)
vs Frequency (LVCMOS 1.8V T
RealDigital
design
0.021
0
75
50
25
Table
0
A
0
Figure 1: I
technology
= 25°C)
1). This
11.68
www.xilinx.com
30
Frequency (MHz)
(1)
50
CC
vs Frequency
Due to this technology, Xilinx CoolRunner-II Automotive
CPLDs achieve both high-performance and low power
operation.
Supported I/O Standards
The CoolRunner-II Automotive 256-macrocell device fea-
tures LVCMOS and LVTTL I/O implementations. See
Table 1
is a general purpose EIA/JEDEC standard for 3.3V applica-
tions that use an LVTTL input buffer and Push-Pull output
buffer. The LVCMOS standard is used in 3.3V, 2.5V, 1.8V
applications. CoolRunner-II Automotive CPLDs are also
1.5V I/O compatible with the use of Schmitt-trigger inputs
Table 1: I/O Standards for XA2C256
(1) LVCMOS15 requires Schmitt-trigger inputs.
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
19.40
IOSTANDARD Attribute
100
50
DS555_01_092106
Frequency (MHz)
for I/O standard voltages. The LVTTL I/O standard
150
(1)
27.01
70
38.18
100
Output V
3.3
3.3
2.5
1.8
1.5
DS555 (v1.1) May 5, 2007
45.54
Product Specification
CCIO
120
Input V
3.3
3.3
2.5
1.8
1.5
56.32
150
CCIO
R