ADSP-21262_05 AD [Analog Devices], ADSP-21262_05 Datasheet - Page 36

• Manufacturer Part Number: ADSP-21262_05
• Description: Embedded Processor
• Manufacturer: AD [Analog Devices]

ADSP-21262
JTAG Test Access Port and Emulation
See
Table 31. JTAG Test Access Port and Emulation
1
2
Parameter
Timing Requirements
t
t
t
t
t
t
Switching Characteristics
t
t
System Inputs = AD15–0, SPIDS, CLKCFG1–0, RESET, BOOTCFG1–0, MISO, MOSI, SPICLK, DAI_Px, FLAG3–0.
System Outputs = MISO, MOSI, SPICLK, DAI_Px, AD15–0, RD, WR, FLAG3–0, CLKOUT, EMU, ALE.
TCK
STAP
HTAP
SSYS
HSYS
TRSTW
DTDO
DSYS
CPHASE = 1
CPHASE = 0
Table 31
(OUTPUT)
(OUTPUT)
(CP = 0)
(CP = 1)
(INPUT)
(INPUT)
(INPUT)
SPICLK
(INPUT)
SPICLK
(INPUT)
SPIDS
MISO
MOSI
MISO
MOSI
and
t
S D S C O
t
Figure
TCK Period
TDI, TMS Setup Before TCK High
TDI, TMS Hold After TCK High
System Inputs Setup Before TCK High
System Inputs Hold After TCK High
TRST Pulse Width
TDO Delay from TCK Low
System Outputs Delay After TCK Low
t
t
D S O E
D S O E
D S O V
27.
t
t
S P IC H S
S S P I D S
t
t
D D S P I D S
MSB VALID
S P I C L S
MSB VALID
MSB
MSB
t
D D S P I D S
Rev. B | Page 36 of 48 | August 2005
1
t
t
S P I C H S
Figure 26. SPI Protocol—Slave
S P I C L S
2
1
t
S S P I D S
t
D D S P I D S
LSB VALID
t
t
S P I C L K S
S S P I D S
t
H D S P I D S
LSB
LSB VALID
t
H S P I D S
Min
20
5
6
7
8
4t
CK
t
H S P I D S
t
H D S
LSB
t
S D P P W
Max
7
10
t
t
t
D S D H I
H D S P I D S
D S D H I
Unit
ns
ns
ns
ns
ns
ns
ns
ns