CY8C20X36A CYPRESS [Cypress Semiconductor], CY8C20X36A Datasheet - Page 28

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CY8C20X36A

Manufacturer Part Number
CY8C20X36A
Description
CapSense Applications Operating Range: 1.71 V to 5.5 V
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
AC I
The following table lists guaranteed maximum and minimum specifications for the entire voltage and temperature ranges.
Table 31. AC Characteristics of the I
Document Number: 001-54459 Rev. *E
f
t
t
t
t
t
t
t
t
t
Note
SCL
HD;STA
LOW
HIGH
SU;STA
HD;DAT
SU;DAT
SU;STO
BUF
SP
41. A Fast-Mode I
Symbol
case if the device does not stretch the LOW period of the SCL signal. If such device does stretch the LOW period of the SCL signal, it must output the next data bit
to the SDA line t
2
C Specifications
SCL clock frequency
Hold time (repeated) START condition. After this period, the first clock pulse is
generated
LOW period of the SCL clock
HIGH Period of the SCL clock
Setup time for a repeated START condition
Data hold time
Data setup time
Setup time for STOP condition
Bus free time between a STOP and START condition
Pulse width of spikes are suppressed by the input filter
2
C-bus device can be used in a standard mode I
rmax
+ t
SU;DAT
Figure 15. Definition for Timing for Fast/Standard Mode on the I
= 1000 + 250 = 1250 ns (according to the Standard-Mode I
2
C SDA and SCL Pins
Description
2
C-bus system, but the requirement t
2
C-bus specification) before the SCL line is released.
SU;DAT
CY8C20X36A/46A/66A/96A
≥ 250 ns must then be met. This automatically be the
Min
250
4.0
4.7
4.0
4.7
4.0
4.7
0
0
Standard
2
C Bus
Mode
Max
3.45
100
100
Fast Mode
Min
0.6
1.3
0.6
0.6
0.6
1.3
0
0
0
[41]
Page 28 of 43
Max
0.90
400
50
Units
kHz
µs
µs
µs
µs
µs
µs
µs
ns
ns
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