MC68HC11E1 MOTOROLA [Motorola, Inc], MC68HC11E1 Datasheet - Page 33

• Manufacturer Part Number: MC68HC11E1
• Description: M68HC11E Series Programming Reference Guide
• Manufacturer: MOTOROLA [Motorola, Inc]

Arm/Reset COP Timer Circuitry Register (COPRST)
Data Direction Register for Port C (DDRC)
Data Direction Register for Port D (DDRD)
EPROM Programming Control Register (EPROG)
MOTOROLA
Address:
Write $55 to COPRST to arm COP watchdog clearing mechanism. Write $AA
to COPRST to reset COP watchdog.
Address:
DDC[7:0] — Data Direction for Port C
Address:
Bits [7:6] — Unimplemented
DDD[5:0] — Data Direction for Port D
Address:
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Reset:
M68HC11E Series Programming Reference Guide
In handshake output mode, DDRC bits selected the three-stated output
option (DDCx = 1).
Always read 0
Read:
Write:
0 = Input
1 = Output
0 = Input
1 = Output
$103A
$1007
DDC7
$1009
BIT 7
Bit 7
Bit 7
Bit 7
$1036
0
0
0
MBE
Bit 7
0
Unimplemented
= Unimplemented
DDC6
6
6
0
6
0
6
0
6
0
DDC5
DDD5
ELAT
5
5
0
5
0
5
0
5
0
DDC4
DDD4
EXCOL
4
4
0
4
0
4
0
4
0
DDC3
DDD3
EXROW
3
3
0
3
0
3
0
3
0
DDC2
DDD2
2
2
0
2
0
2
0
T1
M68HC11E Series Registers
2
0
DDC1
DDD1
M68HC11ERG/AD
1
1
0
1
0
1
0
T0
1
0
DDC0
DDD0
BIT 0
Bit 0
Bit 0
Bit 0
PGM
0
0
0
Bit 0
0
33