MC68HC11E0CB2 MOTOROLA [Motorola, Inc], MC68HC11E0CB2 Datasheet - Page 179
MC68HC11E0CB2
Manufacturer Part Number
MC68HC11E0CB2
Description
8-channel, 8-bit analog-to-digital (A/D) converter
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC11E0CB2.pdf
(268 pages)
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10.12 MC68L11E9/E20 Peripheral Port Timing
M68HC11E Family — Rev. 5
MOTOROLA
Frequency of operation
E-clock period
Peripheral data setup time
Peripheral data hold time
Delay time, peripheral data write
Port C input data setup time
Port C input data hold time
Delay time, E fall to STRB
Setup time, STRA asserted to E fall
Delay time, STRA asserted to port C data output valid
Hold time, STRA negated to port C data
3-state hold time
1. V
2. Ports C and D timing is valid for active drive. (CWOM and DWOM bits are not set in PIOC and SPCR registers,
3. If this setup time is met, STRB acknowledges in the next cycle. If it is not met, the response may be delayed one more cycle.
E-clock frequency
MCU read of ports A, C, D, and E
MCU read of ports A, C, D, and E
t
t
PWD
DEB
MCU writes to port A
MCU writes to ports B, C, and D
otherwise noted
respectively.)
DD
= 1/4 t
= 1/4 t
= 3.0 Vdc to 5.5 Vdc, V
CYC
CYC
+ 150 ns
+ 150 ns
Characteristic
SS
= 0 Vdc, T
Freescale Semiconductor, Inc.
(3)
(1) (2)
Figure 10-7. Port Read Timing Diagram
For More Information On This Product,
A
= T
Go to: www.freescale.com
L
Electrical Characteristics
to T
H
, all timing is shown with respect to 20% V
Symbol
t
t
t
PDSU
t
t
t
t
t
t
PWD
CYC
PDH
DEB
AES
PCD
PCH
PCZ
t
t
f
IH
IS
o
1000
Min
100
100
dc
50
60
10
MC68L11E9/E20 Peripheral Port Timing
—
—
—
—
—
0
1.0 MHz
Max
250
400
400
100
150
1.0
—
—
—
—
—
—
—
Electrical Characteristics
DD
Min
500
100
100
50
60
10
dc
—
—
—
—
—
0
2.0 MHz
and 70% V
Max
250
275
275
100
150
2.0
—
—
—
—
—
—
—
DD
Data Sheet
, unless
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
179
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