PIC18F2423 MICROCHIP [Microchip Technology], PIC18F2423 Datasheet - Page 146

• Manufacturer Part Number: PIC18F2423
• Description: 28/40/44-Pin, Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F2423/2523/4423/4523
15.4
In Pulse-Width Modulation (PWM) mode, the CCPx pin
produces up to a 10-bit resolution PWM output. Since
the CCP2 pin is multiplexed with a PORTB or PORTC
data latch, the appropriate TRIS bit must be cleared to
make the CCP2 pin an output.
Figure 15-3 shows a simplified block diagram of the
CCPx module in PWM mode.
For a step-by-step procedure on how to set up the
CCPx module for PWM operation, see Section 15.4.4
“Setup for PWM Operation”.
FIGURE 15-3:
A PWM output (Figure 15-4) has a time base (period)
and a time that the output stays high (duty cycle).
The frequency of the PWM is the inverse of the
period (1/period).
FIGURE 15-4:
DS39755B-page 144
Note 1: The 8-bit TMR2 value is concatenated with the 2-bit
Note:
CCPRxH (Slave)
Comparator
Duty Cycle Registers
CCPRxL
TMR2
TMR2 = PR2
PR2
Comparator
PWM Mode
internal Q clock, or 2 bits of the prescaler, to create the
10-bit time base.
Duty Cycle
Clearing the CCPxCON register will force
the
compare latch to the default low level. This
is not the pin output data latch.
Period
(Note 1)
corresponding
Clear Timer,
CCP1 pin and
latch D.C.
TMR2 = Duty Cycle
SIMPLIFIED PWM BLOCK
DIAGRAM
PWM OUTPUT
TMR2 = PR2
CCPxCON<5:4>
R
S
CCP
Q
Corresponding
TRIS bit
pin
CCPx Output
output
Preliminary
15.4.1
The PWM period is specified by writing to the PR2
register. The PWM period can be calculated using the
following formula:
EQUATION 15-1:
PWM frequency is defined as 1/[PWM period].
When TMR2 is equal to PR2, the following three events
occur on the next increment cycle:
• TMR2 is cleared
• The CCPx pin is set (exception: if PWM duty
• The PWM duty cycle is latched from CCPRxL into
15.4.2
The PWM duty cycle is specified by writing to the
CCPRxL register and to the CCPxCON<5:4> bits. Up
to 10-bit resolution is available. The CCPRxL contains
the eight MSbs and the CCPxCON<5:4> contains the
two LSbs. This 10-bit value is represented by
CCPRxL:CCPxCON<5:4>. The following equation is
used to calculate the PWM duty cycle in time:
EQUATION 15-2:
CCPRxL and CCPxCON<5:4> can be written to at any
time, but the duty cycle value is not latched into
CCPRxH until after a match between PR2 and TMR2
occurs (i.e., the period is complete). In PWM mode,
CCPRxH is a read-only register.
cycle = 0%, the CCPx pin will not be set)
CCPRxH
Note:
PWM Duty Cycle = (CCPR
PWM Period = [(PR2) + 1] • 4 • T
PWM PERIOD
The Timer2 postscalers (see Section 13.3
“Timer2 Output”) are not used in the
determination of the PWM frequency. The
postscaler could be used to have a servo
update rate at a different frequency than
the PWM output.
PWM DUTY CYCLE
T
(TMR2 Prescale Value)
OSC
© 2007 Microchip Technology Inc.
• (TMR2 Prescale Value)
X
L:CCP
X
CON<5:4>) •
OSC
•