MC68HC705T16 MOTOROLA [Motorola, Inc], MC68HC705T16 Datasheet - Page 24

• Manufacturer Part Number: MC68HC705T16
• Description: High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit
• Manufacturer: MOTOROLA [Motorola, Inc]

2
2.2
2.2.1
Port A, B, C, E, and F may be programmed as an input or an output under software control. The
direction of the pins is determined by the state of corresponding bit in the port data direction
register (DDR). Each 8-bit port has an associated 8-bit data direction register. Any port A, B, C,
E, or F pin is configured as an output if its corresponding DDR bit is set to a logic one. A pin is
configured as an input if its corresponding DDR bit is cleared to a logic zero. At power-on or reset,
all DDRs are cleared, which configure all port A, B, C, E and F pins as inputs. The data direction
registers are capable of being written to or read by the processor. Refer to Figure 2-2 and
Table 2-1. During the programmed output state, a read of the data register actually reads the value
of the output data latch and not the I/O pin.
2.2.2
Port E and F are shared with PWM, PAC, OSD, MBUS, and ADC. The configuration registers, at
$0C and $0D, are used to configure these I/O pins. The default state after a reset or POR is zero.
Setting the corresponding bits will enable the corresponding functions. For example, setting the
SDA and SCL bits will configure PF5 and PF6 as MBUS interface pins, regardless of the settings
in the port F Data Direction register.
MOTOROLA
2-4
Port E Configuration Register
Port F Configuration Register
R/W
INPUT/OUTPUT PORTS
Input/Output Programming
Port E and F Configuration Registers
0
0
1
1
DDR
PIN DESCRIPTIONS AND INPUT/OUTPUT PORTS
0
1
0
1
The I/O pin is in input mode. Data is written into the output data latch.
Data is written into the output data latch and output to the I/O pin.
The state of the I/O pin is read.
The I/O pin is in an output mode. The output data latch is read.
Address bit 7
Address bit 7
$0C
$0D
Table 2-1 I/O Pin Functions
PWM7 PWM6 PWM5 PWM4 PWM3 PWM2 PWM1 PWM0 0000 0000
PAC
bit 6
bit 6
SCL
I/O Pin Function
bit 5
bit 5
SDA
ADC1 HTONE
bit 4
bit 4
bit 3
bit 3
bit 2
bit 2
I
PWM9 PWM8 0000 0000
bit 1
bit 1
MC68HC05T16
bit 0
bit 0
on reset
on reset
State
State
TPG