USB2224-NU-02 SMSC [SMSC Corporation], USB2224-NU-02 Datasheet - Page 13

• Manufacturer Part Number: USB2224-NU-02
• Description: BUS POWERED USB2.0 FLASH MEDIA CONTROLLER
• Manufacturer: SMSC [SMSC Corporation]

Bus Powered USB2.0 Flash Media Controller
Datasheet
SMSC USB2224
Memory
Address Bus
Memory Read
Strobe
Memory Read
Strobe
Memory Chip
Enable
GPIO6,
ROMEN and
RXD
General
Purpose I/O
General
Purpose I/O
General
Purpose I/O
NAME
SYMBOL
MA[15:0]
/ROMEN
nMWR
GPIO6
GPIO1
GPIO2
GPIO3
nMRD
nMCE
BUFFER
I/O8PU
TYPE
I/O8
I/O8
I/O8
O8
O8
O8
O8
DATASHEET
These signals address memory locations within the
external memory.
Program Memory Write; active low
Program Memory Read; active low
Program Memory Chip Enable; active low. This signal is
asserted, when the device is not is SUSPEND mode.
Note: This signal is held in a logic ‘high’ state (inactive)
This pin has an internal weak pullup resistor that can be
enabled or disabled by the state of nRESET.
The pullup is enabled when nRESET is active.
The pullup is disabled, when the nRESET is inactive
(some clock cycles later, after the rising edge of
nRESET).
The state of this pin is latched internally on the rising
edge of nRESET to determine if internal or external
program memory is used.
The state latched is stored in ROMEN bit of GPIO_IN1
register. After the rising edge of nRESET, this pin may be
used as GPIO6 or RXD.
When pulled low via an external weak pulldown resistor,
an external program memory should be connected to the
memory data bus. The USB2224 uses this external bus
for program execution.
When this pin is left unconnected or pulled high by a
weak pullup resistor, the USB2224 uses the internal ROM
for program execution.
This pin’s function while operating from internal ROM is
shown in Table 6.3 - GPIO Usage.
This pin may be used either as input, edge sensitive
interrupt input, or output.
This pin’s function while operating from internal ROM is
shown in Table 6.3 - GPIO Usage.
This pin may be used either as input, edge sensitive
interrupt input, or output.
This pin’s function while operating from internal ROM is
shown in Table 6.3 - GPIO Usage.
This pin may be used either as input, edge sensitive
interrupt input, or output.
This pin’s function while operating from internal ROM is
shown in Table 6.3 - GPIO Usage.
Page 13
MISC
during nRESET assertion.
DESCRIPTION
Revision 1.3 (09-21-04)