LAN91C100FDREVB SMSC [SMSC Corporation], LAN91C100FDREVB Datasheet - Page 68

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LAN91C100FDREVB

Manufacturer Part Number
LAN91C100FDREVB
Description
FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
Manufacturer
SMSC [SMSC Corporation]
Datasheet
PAGE(S)
20
64
5
SMSC DS – LAN91C100FD REV. B
SECTION/FIGURE/ENTRY
Description of Pin Functions
Table under Bank 0
DC Electrical and Timing
Section
LAN91C100FD REV. B REVISIONS
Pin 175 – Changed to active high signal.
Changed RX_OVRN to 0 on High Byte row.
Removed references to RX_OVRN under table.
Updated SRAM Interface Timing information. Added
additional timing parameters. Please refer to the
application note titled “LAN91C100FD Minimum
SRAM Access Time Requirement and a List of
Recommended SRAMS” for additional details.
Page 68
CORRECTION
REVISED
Rev. 05/31/2000
05/31/00
05/31/00
12/17/99
DATE

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