PIC18F25J11-I/PT MICROCHIP [Microchip Technology], PIC18F25J11-I/PT Datasheet - Page 196
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PIC18F25J11-I/PT
Manufacturer Part Number
PIC18F25J11-I/PT
Description
28/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F25J11-IPT.pdf
(528 pages)
- Current page: 196 of 528
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PIC18F46J11 FAMILY
12.1
The
displayed in Register 12-2, is used to control the
Timer1 gate.
REGISTER 12-2:
DS39932C-page 196
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
Note 1:
TMR1GE
R/W-0
Timer1
Timer1 Gate Control Register
Programming the T1GCON prior to T1CON is recommended.
TMR1GE: Timer1 Gate Enable bit
If TMR1ON = 0:
This bit is ignored.
If TMR1ON = 1:
1 = Timer1 counting is controlled by the Timer1 gate function
0 = Timer1 counts regardless of Timer1 gate function
T1GPOL: Timer1 Gate Polarity bit
1 = Timer1 gate is active-high (Timer1 counts when gate is high)
0 = Timer1 gate is active-low (Timer1 counts when gate is low)
T1GTM: Timer1 Gate Toggle Mode bit
1 = Timer1 Gate Toggle mode is enabled
0 = Timer1 Gate Toggle mode is disabled and toggle flip-flop is cleared
Timer1 gate flip-flop toggles on every rising edge.
T1GSPM: Timer1 Gate Single Pulse Mode bit
1 = Timer1 Gate Single Pulse mode is enabled and is controlling Timer1 gate
0 = Timer1 Gate Single Pulse mode is disabled
T1GGO/T1DONE: Timer1 Gate Single Pulse Acquisition Status bit
1 = Timer1 gate single pulse acquisition is ready, waiting for an edge
0 = Timer1 gate single pulse acquisition has completed or has not been started
This bit is automatically cleared when T1GSPM is cleared.
T1GVAL: Timer1 Gate Current State bit
Indicates the current state of the Timer1 gate that could be provided to TMR1H:TMR1L; unaffected by
Timer1 Gate Enable (TMR1GE) bit.
T1GSS<1:0>: Timer1 Gate Source Select bits
00 = Timer1 gate pin
01 = Timer0 overflow output
10 = TMR2 to match PR2 output
Gate
T1GPOL
R/W-0
T1GCON: TIMER1 GATE CONTROL REGISTER (F9Ah)
Control
W = Writable bit
‘1’ = Bit is set
T1GTM
R/W-0
register
(T1GCON),
T1GSPM
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
T1GGO/T1DONE
R/W-0
T1GVAL
R-x
(1)
© 2009 Microchip Technology Inc.
x = Bit is unknown
T1GSS1
R/W-0
T1GSS0
R/W-0
bit 0
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