PIC18F25J11-I/PT MICROCHIP [Microchip Technology], PIC18F25J11-I/PT Datasheet - Page 362

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PIC18F25J11-I/PT

Manufacturer Part Number
PIC18F25J11-I/PT
Description
28/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
PIC18F46J11 FAMILY
21.7
When a comparator is active and the device is placed
in Sleep mode, the comparator remains active and the
interrupt is functional if enabled. This interrupt will
wake-up the device from Sleep mode when enabled.
Each operational comparator will consume additional
current. To minimize power consumption while in Sleep
mode, turn off the comparators (CON = 0) before
entering Sleep. If the device wakes up from Sleep, the
contents of the CMxCON register are not affected.
TABLE 21-3:
DS39932C-page 362
INTCON
PIR2
PIE2
IPR2
CMxCON
CVRCON
CMSTAT
ANCON0
PORTA
TRISA
Legend:
Note 1:
Name
Comparator Operation During
Sleep
(1)
These bits and/or registers are not implemented on 28-pin devices.
— = unimplemented, read as ‘0’, r = reserved. Shaded cells are not related to comparator operation.
GIE/GIEH PEIE/GIEL
PCFG7
OSCFIF
OSCFIE
OSCFIP
CVREN
TRISA7
Bit 7
CON
REGISTERS ASSOCIATED WITH COMPARATOR MODULE
RA7
(1)
PCFG6
CVROE
TRISA6
CM2IF
CM2IE
CM2IP
Bit 6
COE
RA6
(1)
PCFG5
TMR0IE
TRISA5
CM1IE
CM1IP
CM1IF
CVRR
CPOL
Bit 5
RA5
(1)
EVPOL1
CVRSS
PCFG4
INT0IE
Bit 4
EVPOL0
21.8
A device Reset forces the CMxCON registers to their
Reset state. This forces both comparators and the
voltage reference to the OFF state.
TRISA3
BCL1IF
BCL1IE
BCL1IP
PCFG3
CVR3
RBIE
Bit 3
RA3
Effects of a Reset
TMR0IF
TRISA2
PCFG2
LVDIE
LVDIP
LVDIF
CREF
CVR2
Bit 2
RA2
TMR3IE
TMR3IP
TMR3IF
COUT2
TRISA1
PCFG1
INT0IF
© 2009 Microchip Technology Inc.
CCH1
CVR1
Bit 1
RA1
CCP2IF
CCP2IE
CCP2IP
COUT1
TRISA0
PCFG0
CCH0
CVR0
RBIF
Bit 0
RA0
on Page:
Values
Reset
63
65
65
65
64
68
67
68
66
66

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