PEB2096 SIEMENS [Siemens Semiconductor Group], PEB2096 Datasheet - Page 54

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PEB2096

Manufacturer Part Number
PEB2096
Description
Octal Transceiver for UPN Interfaces OCTAT-P
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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5.5
CLK1
Parameter
High phase of crystal/clock
Low phase of crystal/clock
Clock period
CLK2
Parameter
High phase of crystal/clock
Low phase of crystal/clock
Clock period
CLK2 is directly derived from the oscillator clock and can drive up to 6 oscillator inputs
of the ISAC-S, PEB 2085.
Figure 27
Definition of Clock Period and Width
Semiconductor Group
Clocks
0.8 V
3.5 V
Symbol
t
t
T
Symbol
t
t
T
WH
WL
WH
WL
P
P
t
WH
min.
25
25
65.08
min.
57
57
130.16
54
T
Limit Values
Limit Values
P
max.
65.12
max.
130.24
t
WL
Unit Test Condition
ns
ns
ns
Unit Test Condition
ns
ns
ns
50 pF load
capacitance at
CLK
50 pF load
capacitance at
CLK
50 pF load
capacitance at
CLK
50 pF load
capacitance at
CLK
ITT00766
PEB 2096
01.96

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