SAB80C515A-5 SIEMENS [Siemens Semiconductor Group], SAB80C515A-5 Datasheet - Page 92

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SAB80C515A-5

Manufacturer Part Number
SAB80C515A-5
Description
8-Bit CMOS Single-Chip Microcontroller Family
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
Fail Safe Units
The SAB 80C515A offers enhanced fail safe mechanisms, which allow an automatic recovery
from software upset or hardware failure:
– a programmable watchdog timer (WDT), with variable time-out period from 512 s up to
– an oscillator watchdog (OWD) which monitors the on-chip oscillator and forces the
Programmable Watchdog Timer
The WDT can be activated by hardware or software.
Hardware initialization is done when pin PE/SWD (Pin 4) is held high during RESET. The
SAB 80C515A then starts program execution with the WDT running. Since pin PE/SWD is only
sampled during Reset, the WDT cannot be started externally during normal operation.
Software initialization is done by setting bit SWDT in SFR IEN1.
A refresh of the watchdog timer is done by setting bits WDT (SFR IEN0) and SWDT
consecutively. This double instruction sequence has been implemented to increase system
security.
When a watchdog timer reset occurs, the watchdog timer keeps on running, but a status flag
WDTS (SFR IP0) is set. This flag can also be cleared by software.
Figure 7 shows the block diagram of the programmable Watchdog Timer.
Oscillator Watchdog
The unit serves three functions:
– Monitoring of the on-chip oscillator’s function.
– Restart from the Hardware Power Down Mode.
– Fast internal reset after power-on.
Semiconductor Group
appr. 1.1 s @12 MHz. Upward compatible to SAB 80C515 watchdog timer.
microcontroller into reset state, in case the on-chip oscillator fails; it also controls the restart
from the Hardware Power Down Mode and provides the clock for a fast internal reset after
power-on.
The watchdog monitors the on-chip oscillator’s frequency; if it is lower than the frequency of
the auxiliary RC oscillator in the watchdog unit, the internal clock is supplied by the RC
oscillator and the device is forced into reset; if the failure condition disappears (i.e. the on-
chip oscillator has again a higher frequency than the RC oscillator), the part executes a final
reset phase of appr. 0.25 ms in order to allow the oscillator to stabilize; then the oscillator
watchdog reset is released and the part starts program execution again.
If the Hardware Power Down Mode is terminated the oscillator watchdog has to control the
correct start-up of the on-chip oscillator and to restart the program. The oscillator watchdog
function is only part of the complete Hardware Power Down sequence; however, the
watchdog works identically to the monitoring function.
In this function the oscillator watchdog unit provides a clock supply for the reset before the
on-chip oscillator has started. In this case the oscillator watchdog unit also works identically
to the monitoring function.
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SAB 80C515A/83C515A-5

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