DZPD6722VCCE INTEL [Intel Corporation], DZPD6722VCCE Datasheet - Page 71
DZPD6722VCCE
Manufacturer Part Number
DZPD6722VCCE
Description
ISA-to-PC-Card (PCMCIA) Controllers
Manufacturer
INTEL [Intel Corporation]
Datasheet
1.DZPD6722VCCE.pdf
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Datasheet
-INTR or
IRQ[XX]
Figure 11. Pulse Mode Interrupts
Bit 3 — Pulse System IRQ
This bit selects Level or Pulse mode operation of the IRQ[XX] pins for interrupts from a PC Card
RDY/-IREQ pin (
Bit 4 — Speaker Enable
This bit determines whether the card -SPKR pin will drive SPKR_OUT* (
Bit 7 — Inpack Enable
This bit is used to determine when to drive data onto the ISA bus.
High-Z
0
1
0
1
0
1
RDY/-IREQ generated interrupts are passed to the IRQ[XX] pin as level-sensitive.
When a RDY/-IREQ interrupt occurs, the IRQ[XX] pin is driven with the pulse train shown in
Figure 11
SPKR_OUT* is high-impedance.
SPKR_OUT* is driven from the XOR of -SPKR from each enabled socket.
-INPACK pin
-INPACK pin used to control data bus drivers during I/O read from the socket.
Table
and allows for interrupt sharing.
Driven low
2).
(Table
2) ignored.
ISA-to-PC-Card (PCMCIA) Controllers — PD6710/’22
Driven high
Table
1).
High-Z
71
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