STA016 STMICROELECTRONICS [STMicroelectronics], STA016 Datasheet - Page 14

• Manufacturer Part Number: STA016
• Description: MPEG 2.5 LAYER III AUDIO DECODER SUPPORTING CD-ROM CAPABILITY
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STA016A
6
6.1 VERSION registers description
6.1.1
Address : 0x00 (0)
Type : RO - DWT
Software Reset : 0x10
Hardware Reset : 0x10
Description :
The VERSION register is Read-only and it is used to
identify the IC on the application board.
6.1.2
Address : 0x01 (1)
Type : RO - DWT
Software Reset : 0xAC
Hardware Reset : 0xAC
Description :
IDENT is a read-only register and it is used to identify
the IC on an application board. IDENT always has the
value 0xAC.
6.1.3
Address : 0xD3 (211)
Type : RO - DWT
Software Reset : X
Description :
The SOFT_VERSION register is Read-only and it is
used to identify the software running on the IC.
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1
b7
b7
b7
REGISTER DESCRIPTION
0
VERSION :
IDENT :
SOFT_VERSION :
b6
b6
b6
1
b5
b5
b5
0
b4
b4
b4
1
b3
b3
b3
1
b2
b2
b2
0
b1
b1
b1
0
b0
b0
b0
6.2 PLL_AUDIO_CONFIGURATION registers
6.2.1
Address : 0xDC (220)
Type : RW - DEC
Software Reset : 58
Description :
This register must contain a PEL value that enables
the audio PLL to generate a frequency of ofact*192
kHz for the PCMCK.See table 1, 2 & 3.
ofact is the oversampling factor needed by the DAC
(ofac==246 or ofac==384).
Default value at soft reset assume :
6.2.2
Address : 0xDD (221)
Type : RW - DEC
Software Reset : 187
Description :
This register must contain a PEH value that enables
the audio PLL to generate a frequency of ofact*192
kHz for the PCMCK.See table 1, 2 & 3.
Default value at soft reset assume :
6.2.3
Address : 0xDE (222)
Type : RW - DEC
Software Reset : 0
b7
b7
b7
– ofact == 256
– external crystal provide a CRYCK running at
– ofact == 256
– external crystal provide a CRYCK running at
description
14.31818 MHz
14.31818 MHz
PLL_AUDIO_PEL_192 :
PLL_AUDIO_PEH_192 :
PLL_AUDIO_NDIV_192 :
b6
b6
b6
b5
b5
b5
b4
b4
b4
b3
b3
b3
b2
b2
b2
b1
b1
b1
b0
b0
b0