X96011_08 INTERSIL [Intersil Corporation], X96011_08 Datasheet - Page 4

• Manufacturer Part Number: X96011_08
• Description: Temperature Sensor with Look-Up Table Memory and DAC
• Manufacturer: INTERSIL [Intersil Corporation]

D/A Converter Characteristics
NOTES:
2-Wire Interface AC Characteristics
IFS
Offset
FSError
DNL
INL
VISink
VISource
I
I
t
TCO
f
t
(Note 11)
t
(Note 11)
t
(Note 11)
t
t
t
t
5. LSB is defined as
6. Offset
7. These parameters are periodically sampled and not 100% tested.
OVER
UNDER
rDAC
SCL
IN
AA
BUF
LOW
HIGH
SU:STA
HD:STA
SYMBOL
SYMBOL
DAC
in LSB.
FSError
expressed in LSB. The Offset
DNL
of the DAC, when the input changes by one code step. It is expressed in LSB. The measured values are adjusted for Offset and Full Scale Error
before calculating DNL
INL
measured transfer curve for Offset and Full Scale Error. It is expressed in LSB.
DAC
I1I2
DAC
DAC
DAC
DAC
DAC
: The Integral Non-Linearity of a DAC is defined as the deviation between the measured and ideal transfer curves, after adjusting the
DAC
: The Differential Non-Linearity of a DAC is defined as the deviation between the measured and ideal incremental change in the output
: The Offset of a DAC is defined as the deviation between the measured and ideal output, when the DAC input is 01h. It is expressed
Scl Clock Frequency
Pulse Width Suppression Time At
Inputs
Scl Low To Sda Data Out Valid
Time The Bus Free Before Start Of New
Transmission
Clock Low Time
Clock High Time
Start Condition Setup Time
Start Condition Hold Time
: The Full Scale Error of a DAC is defined as the deviation between the measured and ideal output, when the input is FFh. It is
Iout Full Scale Current
Iout D/a Converter Offset Error
Iout D/a Converter Full Scale Error
Iout D/a Converter
Differential Nonlinearity
Iout D/a Converter Integral
Nonlinearity With Respect To A Straight Line
Through 0 And The Full Scale Value
I1 Sink Voltage Compliance
I1 Source Voltage Compliance
I1 Overshoot On D/a Converter Data Byte
Transition
I1 Undershoot On D/a Converter Data Byte
Transition
I1 Rise Time On D/a Converter Data Byte
Transition; 10% To 90%
Temperature Coefficient Of Output
Current Iout
[
2
3
x
DAC
V(VRef)
255
.
PARAMETER
PARAMETER
4
DAC
]
is subtracted from the measured value before calculating FSError
divided by the resistance between R
(See pg. 5 for standard conditions)
DAC input Byte = FFh,
Source or sink mode, V(I
V
sink mode.
(Notes 5, 6 )
In this range the current at I1 vary < 1%
In this range the current at I1 vary < 1%
DAC input byte changing from 00h to
FFh and vice versa, V(I1) is V
in source mode and 1.2V in sink mode.
(Note 7)
See Figure 5
See Table 2-Wire Interface Test
Conditions on page 5
(Figure 1, 2 and 3)
CC
X96011
-1.2V in source mode and 1.2V in
TEST CONDITIONS
TEST CONDITIONS
1
or R
2
to Vss.
OUT
) is
CC
- 1.2V
1 (Note 10)
DAC
1300
MIN
600
600
1.3
0.6
1.56
MIN
-0.5
1.2
-2
-1
1
0
5
.
±200
TYP
1.58
TYP
V
(Note 10)
(Note 10)
CC
MAX
V
MAX
1200
1200
1.6
0.5
30
400
900
1
2
1
CC
0
0
50
- 1.2
February 25, 2008
ppm/°C
UNITS
UNIT
LSB
LSB
LSB
LSB
mA
kHz
FN8215.2
µA
µA
µs
ns
ns
ns
µs
µs
ns
ns
V
V