STDVE001ABTR STMICROELECTRONICS [STMicroelectronics], STDVE001ABTR Datasheet - Page 17

• Manufacturer Part Number: STDVE001ABTR
• Description: Adaptive single 3.4 Gbps TMDS/HDMI signal equalizer
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STDVE001A
3.5
3.6
I
The device contains two identical bi-directional open-drain, non-inverting buffer circuits that
enable I
STDVE001A buffers both the serial data (DDC SDA) and serial clock (DDC SCL) on the I
bus, while retaining all the operating modes and features of the I
two buses of 400 pF bus capacitance to be connected in an I
are operational from a supply V of 3.0 V to 3.6 V.
The I
STDVE001A enables the system designer to isolate the two halves of a bus,
accommodating more I
buses, one at 5 V and the other at 3.3 V or a 400 kHz and 100 kHz bus, where the 100 kHz
bus is isolated when 400 kHz operation of the other bus is required. The STDVE001A can
be used to run the I
The DDC_EN acts as the enable for the DDC buffer. The DDC_EN line should not change
state during an I
enabling port may through a bus cycle could confuse the I
DDC_EN input should change state only when the global bus and repeater port are in idle
state, to prevent system failures.
The output low levels for each internal buffer are approximately 0.5 V, but the input voltage
of each internal buffer must be 70 mV or more below the output low level, when the output
internally is driven low. This prevents a lock-up condition from occurring when the input low
condition is released.
As with the standard I
levels on the buffered bus. The STDVE001A has standard open collector configuration of
the I
repeater must have a pull up resistor.
This part is designed to work with standard mode and fast mode I
mode I
in a generic I
Under certain conditions, higher termination currents can be used.
Power-down condition
The OE_N pin can be used to disable the device. Also there is no ESD protection dode to
supply on any of the IOs. This prevents a reverse current flow condition when the main box
is switched off while the TV is switched on.
The OE_N is used to disable most of the internal circuitry of STDVE001A that puts the
device in a low power mode of operation.
2
C DDC line repeater
2
2
C bus. The size of the pull up resistors depends on the system, but each side of the
C bus capacitance limit of 400 pF restricts the number of devices and bus length. The
2
C devices only specify 3 mA output drive, this limits the termination current to 3 mA
2
C DDC bus lines to be extended without degradation in system performance. The
2
C system where standard mode devices and multiple masters are possible.
2
C operation, because disabling during bus operation hangs the bus and
2
C bus at both 5 V and 3.3 V interface levels.
2
C system, pull up resistors are required to provide the logic high
2
C devices or longer trace lengths. It can also be used to run two
2
C ports being enabled. The
2
C application. These buffers
2
C system. This enables
2
C devices. Standard
Functional description
17/49
2
C