PSD301-B-15J STMICROELECTRONICS [STMicroelectronics], PSD301-B-15J Datasheet - Page 18

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PSD301-B-15J

Manufacturer Part Number
PSD301-B-15J
Description
Low Cost Field Programmable Microcontroller Peripherals
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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10.0
I/O Port
Functions
Table 5A. CSIOPORT Registers for 8-Bit Data Busses
Table 5B. CSIOPORT Registers for 16-Bit Data Busses
The PSD3XX has three I/O ports (Ports A, B, and C) that are configurable at the bit level.
This permits great flexibility and a high degree of customization for specific applications.
The next section describes the control registers for the ports. Following that are sections
that describe each port. Figures 5 through 7 show the structure of Ports A through C,
respectively.
Note: any unused input should be connected directly to ground or pulled up to V
(using a 10KΩ to 100KΩ resistor).
10.1 CSIOPORT Registers
Control of the ports is primarily handled through the CSIOPORT registers. There are 24
bytes in the address space, starting at the base address labeled CSIOPORT. Since the
PSD3XX uses internal address lines A15-A8 for decoding, the CSIOPORT space will
occupy 2 Kbytes of memory, on a 2 Kbyte boundary. This resolution can be improved to
reduce wasted address space by connecting lower order address lines (A7 and below)
to Port C. Using this method, resolution down to 256 Kbytes may be achieved. The
CSIOPORT space must be defined in your PSDsoft design file. The following tables list
the registers located in the CSIOPORT space.
16-Bit Users Note
When referring to Table 5B, realize that Ports A and B are still accessible on a byte basis.
Note: When accessing Port B on a 16-bit data bus, BHE must be low.
NOTE: 1. ZPSD only.
NOTE: 1. ZPSD only.
Port A Pin Register
Port A Direction Register
Port A Data Register
Port B Pin Register
Port B Direction Register
Port B Data Register
Power Management Register (Note 1)
Page Register
Port A/B Pin Register
Port A/B Direction Register
Port A/B Data Register
Power Management Register (Note 1)
Page Register
Register Name
Register Name
from CSIOPORT
from CSIOPORT
Offset (in hex)
Offset (in hex)
Base Address
Base Address
+10
+18
+10
+18
+2
+4
+6
+3
+5
+7
+2
+4
+6
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Allowed
Allowed
Type of
Type of
Access
Access
PSD3XX Family
Read
Read
Read
CC
15

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