74AC899QCQB NSC [National Semiconductor], 74AC899QCQB Datasheet

no-image

74AC899QCQB

Manufacturer Part Number
74AC899QCQB
Description
9-Bit Latchable Transceiver with Parity Generator/Checker
Manufacturer
NSC [National Semiconductor]
Datasheet
C 1995 National Semiconductor Corporation
74AC899 54ACT 74ACT899
9-Bit Latchable Transceiver
with Parity Generator Checker
General Description
The ’AC ’ACT899 is a 9-bit to 9-bit parity transceiver with
transparent latches The device can operate as a feed-
through transceiver or it can generate check parity from the
8-bit data busses in either direction The ’AC ’ACT899 fea-
tures independent latch enables for the A-to-B direction and
the B-to-A direction a select pin for ODD EVEN parity and
separate error signal output pins for checking parity
Logic Symbol
TRI-STATE is a registered trademark of National Semiconductor Corporation
FACT
TM
is a trademark of National Semiconductor Corporation
TL F 10637
TL F 10637– 1
Features
Y
Y
Y
Y
Y
Y
Y
Y
Y
Connection Diagram
Latchable transceiver with output sink of 24 mA
Option to select generate parity and check or ‘‘feed-
through’’ data parity in directions A-to-B or B-to-A
Independent latch enable for A-to-B and B-to-A direc-
tions
Select pin for ODD EVEN parity
ERRA and ERRB output pins for parity checking
Ability to simultaneously generate and check parity
May be used in system applications in place of the ’280
May be used in system applications in place of the ’657
and ’373 (no need to change T R to check parity)
4 kV minimum ESD immunity
Pin Assignment for PCC and LCC
RRD-B30M75 Printed in U S A
August 1994
TL F 10637– 2

Related parts for 74AC899QCQB

74AC899QCQB Summary of contents

Page 1

Latchable Transceiver with Parity Generator Checker General Description The ’AC ’ACT899 is a 9-bit to 9-bit parity transceiver with transparent latches The device can operate as a feed- through transceiver or it can generate check parity ...

Page 2

Pin Names Description A –A A Bus Data Inputs Data Outputs –B B Bus Data Inputs Data Outputs 0 7 APAR BPAR A and B Bus Parity Inputs ODD EVEN ODD EVEN Parity Select Active LOW for ...

Page 3

Functional Block Diagram AC Path A APAR B BPAR BPAR A APAR FIGURE 10637– 10637 – 4 ...

Page 4

AC Path (Continued) A BPAR n (B APAR ERRA n (B ERRB ERRA O E ERRB FIGURE 2 FIGURE 3 FIGURE 10637 – 10637 – ...

Page 5

AC Path (Continued BPAR (O E APAR) APAR ERRA (BPAR ERRB FIGURE 5 FIGURE 6 FIGURE 10637– 10637– 10637– 10 ...

Page 6

AC Path (Continued SEL BPAR (SEL APAR) LEA BPAR (LEB APAR FIGURE 8 FIGURE 9 FIGURE 10637 – 10637 – 10637 ...

Page 7

AC Path (Continued) TS(H) TH(H) LEA APAR (LEB BPAR TS(L) TH(L) LEA APAR (LEB BPAR FIGURE 11 FIGURE 12 FIGURE 10637– 14 ...

Page 8

Absolute Maximum Ratings If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage ( Input Diode Current ( ...

Page 9

DC Electrical Characteristics for ’AC Family Devices V CC Symbol Parameter (V) I Minimum Dynamic 5 5 OLD Output Current OHD I Maximum Quiescent Supply Current I Maximum TRI-STATE OZ Leakage Current 5 5 ...

Page 10

AC Electrical Characteristics Symbol Parameter t Propagation Delay PLH PHL Propagation Delay PLH t APAR BPAR to BPAR APAR PHL t Propagation Delay PLH BPAR ...

Page 11

AC Operating Requirements Symbol Parameter t Setup Time HIGH or LOW PAR to LEA LEB Hold Time HIGH or LOW PAR to LEA LEB Pulse Width for LEA ...

Page 12

AC Operating Requirements Symbol Parameter t Setup Time HIGH or LOW PAR to LEA LEB Hold Time HIGH or LOW PAR to LEA LEB Pulse Width for LEB ...

Page 13

13 ...

Page 14

Physical Dimensions inches (millimeters) LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life ...

Related keywords