74ACT541_01 STMICROELECTRONICS [STMicroelectronics], 74ACT541_01 Datasheet

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74ACT541_01

Manufacturer Part Number
74ACT541_01
Description
OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (NON INVERTED)
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
DESCRIPTION
The 74ACT541 is an advanced high-speed CMOS
OCTAL BUS BUFFER (3-STATE) fabricated with
sub-micron silicon gate and double-layer metal
wiring C
The 3 STATE control gate operates as two input
AND such that if either G1 and G2 are high, all
eight outputs are in the high impedance state.
In order to enhance PC board layout, the
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 2001
HIGH SPEED: t
LOW POWER DISSIPATION:
I
COMPATIBLE WITH TTL OUTPUTS
V
50 TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
BALANCED PROPAGATION DELAYS:
t
OPERATING VOLTAGE RANGE:
V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 541
IMPROVED LATCH-UP IMMUNITY
CC
PLH
OH
IH
CC
= 4 A(MAX.) at T
= 2V (MIN.), V
| = I
(OPR) = 4.5V to 5.5V
2
MOS tecnology.
t
PHL
OL
= 24mA (MIN)
PD
IL
= 4ns (TYP.) at V
= 0.8V (MAX.)
A
=25°C
WITH 3 STATE OUTPUTS (NON INVERTED)
CC
= 5V
ORDER CODES
74ACT541 offers a pinout having inputs and
outputs on opposite sides of the package.
This device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levlels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PACKAGE
TSSOP
SOP
DIP
DIP
OCTAL BUS BUFFER
74ACT541M
74ACT541B
TUBE
SOP
74ACT541
74ACT541MTR
74ACT541TTR
TSSOP
T & R
1/9

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74ACT541_01 Summary of contents

Page 1

WITH 3 STATE OUTPUTS (NON INVERTED) HIGH SPEED 4ns (TYP LOW POWER DISSIPATION A(MAX =25° COMPATIBLE WITH TTL OUTPUTS (MIN.), V = 0.8V (MAX.) IH ...

Page 2

INPUT AND OUTPUT EQUIVALENT CIRCUIT TRUTH TABLE Don’t Care Z : High Impedance ABSOLUTE MAXIMUM RATINGS Symbol V Supply Voltage Input Voltage Output Voltage O I ...

Page 3

DC SPECIFICATIONS Symbol Parameter V V High Level Input IH Voltage V Low Level Input IL Voltage V High Level Output OH Voltage V Low Level Output OL Voltage I Input Leakage Cur- I rent I High Impedance OZ Output ...

Page 4

CAPACITIVE CHARACTERISTICS Symbol Parameter V C Input Capacitance IN Output C OUT Capacitance C Power Dissipation PD Capacitance (note defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating ...

Page 5

WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle) WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle) 74ACT541 5/9 ...

Page 6

Plastic DIP-20 (0.25) MECHANICAL DATA DIM. MIN. a1 0.254 B 1. 6/9 mm TYP. MAX. MIN. 0.010 1.65 0.055 0.45 0.25 25.4 8.5 2.54 22.86 7.1 3.93 3.3 1.34 ...

Page 7

SO-20 MECHANICAL DATA mm DIM. MIN. TYP 0. 0.35 b1 0. 12.60 E 10.00 e 1.27 e3 11.43 F 7. inch MAX. MIN. TYP. 2.65 0.20 0.004 2.45 ...

Page 8

DIM. MIN 0.05 A2 0.85 b 0.19 c 0.09 D 6.4 E 6. PIN 1 IDENTIFICATION 1 8/9 TSSOP20 MECHANICAL DATA mm TYP. MAX. 1.1 ...

Page 9

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. ...

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