IS43R16800A-6T ISSI [Integrated Silicon Solution, Inc], IS43R16800A-6T Datasheet - Page 12

• Manufacturer Part Number: IS43R16800A-6T
• Description: 8Meg x 16 128-MBIT DDR SDRAM
• Manufacturer: ISSI [Integrated Silicon Solution, Inc]

IS43R16800A-6
BURST LENGTH
The highest access throughput of this device can be
achieved by using a burst of either Read or Write
accesses. The number of accesses in each burst
would be pre-configured to be 2, 4, or 8, as shown in
Mode Register Definition (bits M0-M2). When a Read or
Write command is given to the device, the address bits
A0-A8 (x16) select the block of columns and the starting
column for the subsequent burst. The accesses in this
burst can only reference the selected block, and may
wrap-around if a boundary is reached. The Burst Defini-
tion table indicates the relationship between the least
significant address bits and the starting column. The
most significant address bits can select any unique
block of columns in the currently activated row.
BURST DEFINITION
12
Length
Burst
2
4
8
A2
0
0
0
0
1
1
1
1
Starting Column
Address
A1
0
0
1
1
0
0
1
0
0
1
1
1
A0
0
1
0
1
0
1
0
1
1
0
1
0
1
0
0-1-2-3-4-5-6-7
1-2-3-4-5-6-7-0
4-5-6-7-0-1-2-3
5-6-7-0-1-2-3-4
6-7-0-1-2-3-4-5
7-0-1-2-3-4-5-6
2-3-4-5-6-7-0-1
3-4-5-6-7-0-1-2
Sequential
0-1-2-3
1-2-3-0
2-3-0-1
3-0-1-2
0-1
1-0
BURST TYPE
Bursts can be made in either of two types: sequential or
interleaved. The burst type is programmed during a Load
Mode Register command (bit M3). During a Read or
Write burst, the order of accesses is determined by burst
length, starting column, and burst type, as indicated in
the Burst Definition table.
DLL RESET/CLEAR
To cause a DLL reset, the bit M8 is set to 1 in the
Load Mode Register command. When the DLL is
reset, 200 clock cycles are required to occur prior to
any Read operation. To clear the DLL for normal
operation, the bit M8 is set to 0. This device does not
require it, but JEDEC specifications require that any
time that the DLL is reset, it later be cleared prior for
normal operation.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Order of Accesses in a Burst
0-1-2-3-4-5-6-7
4-5-6-7-0-1-2-3
5-4-7-6-1-0-3-2
6-7-4-5-2-3-0-1
7-6-5-4-3-2-1-0
2-3-0-1-6-7-4-5
3-2-1-0-7-6-5-4
1-0-3-2-5-4-7-6
Interleaved
0-1-2-3
1-0-3-2
2-3-0-1
3-2-1-0
0-1
1-0
ISSI
Rev. 00A
04/04/06
®