CY6264-70SNXI CYPRESS [Cypress Semiconductor], CY6264-70SNXI Datasheet

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CY6264-70SNXI

Manufacturer Part Number
CY6264-70SNXI
Description
8K x 8 Static RAM
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Cypress Semiconductor Corporation
Document #: 001-02367 Rev. *A
Features
• Temperature Ranges
• High Speed
• CMOS for optimum speed/power
• Easy memory expansion with CE
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
• Available in Pb-free and non Pb-free 28-lead SNC
Logic Block Diagram
— Commercial: 0°C to 70°C
— Industrial: –40°C to 85°C
— Automotive-A: –40°C to 85°C
— 55 ns
package
CE
CE
WE
OE
1
2
A
A
A
A
A
A
A
A
1
2
3
4
5
6
7
8
COLUMN DECODER
INPUT BUFFER
ARRAY
8K x 8
1
, CE
2
and OE features
POWER
DOWN
198 Champion Court
Functional Description
The CY6264 is a high-performance CMOS static RAM
organized as 8192 words by 8 bits. Easy memory expansion
is provided by an active LOW chip enable (CE
HIGH chip enable (CE
and three-state drivers. Both devices have an automatic
power-down feature (CE
by over 70% when deselected. The CY6264 is packaged in a
450-mil (300-mil body) SOIC.
An active LOW write enable signal (WE) controls the
writing/reading operation of the memory. When CE
inputs are both LOW and CE
input/output pins (I/O
location addressed by the address present on the address
pins (A
selecting the device and enabling the outputs, CE
active LOW, CE
HIGH. Under these conditions, the contents of the location
addressed by the information on address pins is present on
the eight data input/output pins.
The input/output pins remain in a high-impedance state unless
the chip is selected, outputs are enabled, and write enable
(WE) is HIGH. A die coat is used to ensure alpha immunity.
0
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
through A
0
1
2
3
4
5
6
7
San Jose
2
active HIGH, while WE remains inactive or
12
). Reading the device is accomplished by
,
0
CA 95134-1709
2
through I/O
), and active LOW output enable (OE)
Pin Configuration
1
8K x 8 Static RAM
), reducing the power consumption
GND
I/O
I/O
I/O
A
A
A
NC
A
A
A
A
A
A
2
10
11
12
4
5
6
7
8
9
0
1
2
is HIGH, data on the eight data
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Revised August 8, 2006
Top View
7
SOIC
) is written into the memory
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
WE
CE
A
A
A
OE
A
CE
I/O
I/O
I/O
I/O
I/O
CC
3
2
1
0
2
1
7
6
5
4
3
408-943-2600
1
CY6264
), an active
1
1
and WE
and OE
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CY6264-70SNXI Summary of contents

Page 1

... LOW chip enable (CE HIGH chip enable (CE and three-state drivers. Both devices have an automatic power-down feature (CE by over 70% when deselected. The CY6264 is packaged in a 450-mil (300-mil body) SOIC. An active LOW write enable signal (WE) controls the writing/reading operation of the memory. When CE ...

Page 2

... IH, Ind’l Auto > V – 0.3V, Com’ > V – 0. < 0. Ind’l Auto-A Test Conditions T = 25° MHz 5.0V CC CY6264 -70 Unit 70 ns 100 mA 200 mA 200 Ambient Temperature V CC ° ° 5V ± 10 +70 C ° ...

Page 3

... HZCE LZCE LOW, CE HIGH, and WE LOW. Both signals must be LOW to initiate a write and either 1 2 CY6264 ALL INPUT PULSES 90% 90% 10% 10% < < THEVENIN EQUIVALENT 167Ω 1.73V -70 Max. Min. Max. ...

Page 4

... Address valid prior to or coincident with CE transition LOW HIGH for read cycle. 10. Data I/O is High Document #: 001-02367 Rev OHA DOE DATA VALID 50 IH CY6264 DATA VALID t HZOE t HZCE HIGH IMPEDANCE t PD ICC 50% ISB Page [+] Feedback [+] Feedback ...

Page 5

... If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. Document #: 001-02367 Rev SCE1 t SCE2 PWE t SD DATA VALID IN t HZWE HIGH IMPEDANCE SCE1 SCE2 PWE t SD DATA VALID IN t HZWE CY6264 LZWE HIGH IMPEDANCE Page [+] Feedback [+] Feedback ...

Page 6

... AMBIENT TEMPERATURE (°C) TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 30.0 25.0 20.0 15.0 10.0 V =4. =25°C A 5.0 0.0 0 200 400 600 800 1000 CAPACITANCE (pF) CY6264 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 120 100 80 V =5. =25° 0.0 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE (V) OUTPUT SINK CURRENT vs.OUTPUT VOLTAGE ...

Page 7

... A12 Document #: 001-02367 Rev Input/Output X High Z Deselect/Power-Down X High Z Deselect L Data Out Read X Data In Write H High Z Deselect Address Function CY6264 Mode Pin Number Page [+] Feedback [+] Feedback ...

Page 8

... Ordering Code Diagram 55 CY6264-55SNXC 51-85092 CY6264-55SNXI 70 CY6264-70SNC CY6264-70SNXC CY6264-70SNI CY6264-70SNXI CY6264-70SNXA Please contact your local Cypress sales representative for availability of these parts Package Diagram 28-lead (300 mil) SNC Package Outline (Narrow Body) (51-85092) 0.702 0.710 A 0.050 TYP. All products and company names mentioned in this document may be the trademarks of their respective holders. ...

Page 9

... Document History Page Document Title: CY6264 Static RAM Document Number: 001-02367 Orig. of REV. ECN NO. Issue Date Change ** 384870 See ECN *A 488954 See ECN Document #: 001-02367 Rev. *A Description of Change PCI Spec # change from 38-00425 to 001-02367 VKN Added Automotive product Added 55 ns Industrial spec ...

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