CY6264-55SC Cypress Semiconductor, CY6264-55SC Datasheet

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CY6264-55SC

Manufacturer Part Number
CY6264-55SC
Description
8K x 8 Static RAM
Manufacturer
Cypress Semiconductor
Datasheet
Features
Functional Description
The CY6264 is a high-performance CMOS static RAM orga-
nized as 8192 words by 8 bits. Easy memory expansion is
provided by an active LOW chip enable (CE
chip enable (CE
three-state drivers. Both devices have an automatic pow-
er-down feature (CE
Selection Guide
Cypress Semiconductor Corporation
Shaded area contains advanced information.
• 55, 70 ns access times
• CMOS for optimum speed/power
• Easy memory expansion with CE
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
Logic Block Diagram
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum Standby Current (mA)
tures
CE
CE
WE
OE
1
2
A
A
A
A
A
A
A
A
1
2
3
4
5
6
7
8
2
), and active LOW output enable (OE) and
1
), reducing the power consumption by
COLUMN DECODER
INPUT BUFFER
256 x 32 x 8
ARRA Y
1
, CE
1
2
), an active HIGH
, and OE fea-
3901 North First Street
POWER
DOWN
PRELIMINARY
over 70% when deselected.
450-mil (300-mil body) SOIC.
An active LOW write enable signal (WE) controls the writ-
ing/reading operation of the memory. When CE
puts are both LOW and CE
input/output pins (I/O
location addressed by the address present on the address
pins (A
selecting the device and enabling the outputs, CE
active LOW, CE
HIGH. Under these conditions, the contents of the location ad-
dressed by the information on address pins is present on the
eight data input/output pins.
The input/output pins remain in a high-impedance state unless
the chip is selected, outputs are enabled, and write enable
(WE) is HIGH. A die coat is used to insure alpha immunity.
CY6264-55
0
CY6264-1
through A
20/15
100
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
55
San Jose
0
1
2
3
4
5
6
7
2
active HIGH, while WE remains inactive or
12
). Reading the device is accomplished by
0
through I/O
8K x 8 Static RAM
October 1994 – Revised June 1996
2
Pin Configuration
CA 95134
is HIGH, data on the eight data
GND
I/O
I/O
I/O
The CY6264 is packaged in a
A
A
A
NC
A
A
A
A
A
A
10
11
12
4
5
6
7
8
9
0
1
2
7
) is written into the memory
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Top View
SOIC
CY6264-70
20/15
28
27
26
25
24
23
22
21
20
19
18
17
16
15
100
70
V
WE
CE
A
A
A
OE
A
CE
I/O
I/O
I/O
I/O
I/O
408-943-2600
CY6264
CC
3
2
1
0
1
2
1
7
6
5
4
3
and WE in-
CY6264-2
1
and OE

Related parts for CY6264-55SC

CY6264-55SC Summary of contents

Page 1

... TTL-compatible inputs and outputs • Automatic power-down when deselected Functional Description The CY6264 is a high-performance CMOS static RAM orga- nized as 8192 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE chip enable (CE ), and active LOW output enable (OE) and 2 three-state drivers ...

Page 2

... Min. Max. Min. Max. 2.4 2.4 0.4 0.4 2 –0.5 0.8 –0.5 0.8 –5 +5 –5 +5 –5 +5 –5 +5 –300 –300 100 100 Max ALL INPUT PULSES 3.0V 90% 90% 10% GND < 10% Unit Unit pF pF 10% < CY6264-4 ...

Page 3

... AC Test Loads. Transition is measured 500 mV from steady-state voltage less than t for any given device. HZCE LZCE LOW, CE HIGH, and WE LOW. Both signals must be LOW to initiate a write and either CY6264 6264-70 Max. Min. Max. Unit ...

Page 4

... RC t ACE t DOE t LZOE 50 SCE1 t SCE2 PWE t SD DATA VALID IN t HZWE . IH DATA VALID t HZOE t HZCE IMPEDANCE DATA VALID LZWE HIGH IMPEDANCE CY6264 CY6264-5 HIGH ICC ISB CY6264-6 CY6264-7 ...

Page 5

... AMBIENT TEMPERATURE (°C) NORMALIZED ACCESS TIME vs. AMBIENT TEMPERATURE 1.6 1.4 1.2 1.0 V =5.0V CC 0.8 0 125 AMBIENT TEMPERATURE (°C) 5 CY6264 VALID HIGH IMPEDANCE CY6264-8 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 120 100 80 V =5. =25° 0.0 1.0 2.0 3.0 OUTPUT VOLTAGE (V) OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 140 ...

Page 6

... PRELIMINARY (continued) TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 30.0 25.0 20.0 15.0 10.0 V =4. =25°C A 5.0 0.0 0 200 400 600 800 1000 CAPACITANCE(pF) Mode Deselect/Power-Down Deselect Read Write Deselect 6 CY6264 NORMALIZED I vs. CYCLE TIME CC 1.25 V =5. =25° =0.5V CC 1.00 0.75 0. CYCLE FREQUENCY (MHz) ...

Page 7

... Ordering Information Speed Package (ns) Ordering Code 55 CY6264-55SC 70 CY6264-70SC 55 CY6264-55SNC 70 CY6264-70SNC Shaded area contains advanced information. Note: 13. Not recommended for new designs. Document #: 38-00425-A Package Diagrams PRELIMINARY Name Package Type [13] S23 28-Lead 330-Mil SOIC [13] S23 28-Lead 330-Mil SOIC S22 28-Lead 300-Mil SOIC ...

Page 8

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. PRELIMINARY 28-Lead (330-Mil) SOIC S23 CY6264 ...

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