M58LT256JSB8ZA6 STMICROELECTRONICS [STMicroelectronics], M58LT256JSB8ZA6 Datasheet - Page 15

• Manufacturer Part Number: M58LT256JSB8ZA6
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

M58LT256JST, M58LT256JSB
3
3.1
3.2
3.3
3.4
Bus operations
There are six standard bus operations that control the device. These are Bus Read, Bus
Write, Address Latch, Output Disable, Standby and Reset. See
a summary.
Typically glitches of less than 5 ns on Chip Enable or Write Enable are ignored by the
memory and do not affect Bus Write operations.
Bus Read
Bus Read operations are used to output the contents of the Memory Array, the Electronic
Signature, the Status Register and the Common Flash Interface. Both Chip Enable and
Output Enable must be at V
should be used to enable the device. Output Enable should be used to gate data onto the
output. The data read depends on the previous command written to the memory (see
Command Interface section). See Figures 9,
and
Bus Write
Bus Write operations write commands to the memory or latch Input Data to be programmed.
A bus write operation is initiated when Chip Enable and Write Enable are at V
Enable at V
Write Enable or Chip Enable, whichever occurs first. The addresses must be latched prior to
the write operation by toggling Latch Enable (when Chip Enable is at V
must be tied to V
See Figures
for details of the timing requirements.
Address Latch
Address latch operations input valid addresses. Both Chip enable and Latch Enable must be
at V
Latch Enable.
Output Disable
The outputs are high impedance when the Output Enable is at V
IL
23
during address latch operations. The addresses are latched on the rising edge of
Read ac characteristics, for details of when the output becomes valid.
IH
15
. Commands, Input Data and Addresses are latched on the rising edge of
and 16, Write ac waveforms, and Tables
IH
during the bus write operation.
IL
in order to perform a read operation. The Chip Enable input
10
and
11
Read ac waveforms, and Tables
24
and 25, Write ac characteristics,
Table 3: Bus
IH
.
IL
). The Latch Enable
Bus operations
operations, for
IL
with Output
15/106
22