HYI39S512160AE-7.5 QIMONDA [Qimonda AG], HYI39S512160AE-7.5 Datasheet - Page 4

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HYI39S512160AE-7.5

Manufacturer Part Number
HYI39S512160AE-7.5
Description
512-Mbit Synchronous DRAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
1.2
The HY[I/B]39S512[40/80/16]0A[E/T] are four bank Synchronous DRAM’s organized as
banks
rates for CAS latencies by employing a chip architecture that prefetches multiple bits and then synchronizes the output data to
a system clock. The chip is fabricated with Qimonda advanced 0.14 µm 512-MBit DRAM process technology.
The device is designed to comply with all industry standards set for synchronous DRAM products, both electrically and
mechanically. All of the control, address, data input and output circuits are synchronized with the positive edge of an externally
supplied clock.
Operating the four memory banks in an interleave fashion allows random access operation to occur at a higher rate than is
possible with standard DRAMs. A sequential and gapless data rate is possible depending on burst length, CAS latency and
speed grade of the device.
Auto Refresh (CBR) and Self Refresh operation are supported. These devices operate with a single 3.3 V ± 0.3 V power supply.
All 512-Mbit components are available in P(G)-TSOPII-54 packages.
1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined
Rev. 1.52, 2007-06
03292006-6Y91-0T2Z
Product Type
Standard Operating Temperature (0 °C - +70 °C)
HYB39S512400AT-7.5
HYB39S512800AT-7.5
HYB39S512160AT-7.5
HYB39S512400AE-7.5
HYB39S512800AE-7.5
HYB39S512160AE-7.5
Industrial Operating Temperature (–40 °C - +85 °C)
HYI39S512400AT-7.5
HYI39S512800AT-7.5
HYI39S512160AT-7.5
HYI39S512400AE-7.5
HYI39S512800AE-7.5
HYI39S512160AE-7.5
in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury,
lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers.
×
16MBit
×
8 and 4 banks
Description
PC133-333-520
PC133-333-520
Speed Grade
×
8Mbit
×
16 respectively
133MHz 4B × 32M × 4 SDRAM
133MHz 4B × 16M × 8 SDRAM
133MHz 4B × 8M × 16 SDRAM
133MHz 4B × 32M × 4 SDRAM
133MHz 4B × 16M × 8 SDRAM
133MHz 4B × 8M × 16 SDRAM
133MHz 4B × 32M × 4 SDRAM
133MHz 4B × 16M × 8 SDRAM
133MHz 4B × 8M × 16 SDRAM
133MHz 4B × 32M × 4 SDRAM
133MHz 4B × 16M × 8 SDRAM
133MHz 4B × 8M × 16 SDRAM
Description
4
Ordering Information for RoHS Compliant Products
. These synchronous devices achieve high speed data transfer
HY[I/B]39S512[40/80/16]0A[E/T]
512-Mbit Synchronous DRAM
Package
P-TSOPII-54
PG-TSOPII-54
P-TSOPII-54
PG-TSOPII-54
4 banks
Internet Data Sheet
×
32MBit
TABLE 2
Note
1)
1)
×
4, 4

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