HYB18H256321BF QIMONDA [Qimonda AG], HYB18H256321BF Datasheet - Page 24

• Manufacturer Part Number: HYB18H256321BF
• Description: 256-Mbit GDDR3 Graphics RAM GDDR3 Graphics RAM
• Manufacturer: QIMONDA [Qimonda AG]

1)
2) HYB18H256321BF–11/12/14
3) HYB18H256321BF–10
4)
5)
4.3
1) The DC values define where the input slew rate requirements are imposed, and the input signal must not violate these levels in order to
2) Input slew rate = 3 V/ns. If the input slew rate is less than 3 V/ns, input timing may be compromised. All slew rates are measured between
3)
4) The MF pin must be hard-wired on board to either
Rev. 0.80, 2007-09
09132007-07EM-7OYI
Parameter
Power Supply Voltage
Power Supply Voltage for I/O Buffer
Reference Voltage
Output Low Voltage
Input leakage current
CLK Input leakage current
Output leakage current
Parameter
Input logic high voltage, DC
Input logic low voltage, DC
Input logic high voltage, AC
Input logic low voltage, AC
Input logic high, DC, RESET pin
Input logic low, DC, RESET pin
Input Logic High, DC, MF pin
Input Logic Low,DC, MF pin
V
V
on
noise.
I
maintain a valid level.
V
V
undershoot:
IL
DDQ
REF
IL
IH
and
(DC) and
V
overshoot:
REF
is expected to equal 70% of
tracks with
I
OL
may not exceed ±2%
are measured with ODT disabled.
V
V
IH
IL
V
(min) = 0 V for a pulse width ≤ 500ps and the pulse width cannot be greater than 1/3 of the cycle rate.
(DC).
IH
V
(max) =
DD
DC & AC Logic Input Levels
. AC parameters are measured with
V
DDQ
V
+0.5V for a pulse width ≤ 500ps and the pulse width cannot be greater than 1/3 of the cycle rate.
REF
V
DDQ
(DC). Thus, from 70% of
for the transmitting device and to track variations in the DC level of the same. Peak-to-peak noise
Symbol
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IHR
ILR
IHMF
ILMF
DD
Symbol
V
V
V
V
I
I
I
(DC)
(AC)
(DC)
(AC)
IL
ILC
OL
(DC)
(DC)
DD
DDQ
REF
OL(DC)
or
(DC)
(DC)
,
V
V
V
DD
SS
DDA
V
.
and
DDQ
24
,
V
V
Min.
V
—
V
—
0.65 × V
-0.3
V
–0.3
DDQ
REF
REF
REF
DD
Min.
1.7
1.7
0.69*
—
–5.0
–5.0
–5.0
tied together.
is allowed ± 19mV for DC error and an additional ± 27mV for AC
+ 0.15
+ 0.25
DC & AC Logic Input Levels (0 °C ≤ T
V
DDQ
DDQ
Limit Values
Typ.
1.8
1.8
—
—
—
—
—
Limit Values
Max.
—
V
—
V
V
0.35 ×
V
0
REF
REF
DDQ
DD
+ 0.3
-0.15
- 0.25
+ 0.3
V
DDQ
Max.
1.9
1.9
0.71*
0.8
+5.0
+5.0
+5.0
V
DDQ
Internet Data Sheet
HYB18H256321BF
256-Mbit GDDR3
TABLE 11
Unit
V
V
V
V
V
V
V
V
Unit Note
V
V
V
V
μΑ
μΑ
μΑ
c
≤ 85 °C)
Note
1)
1)
2)3)
2)3)
4)
V
1)3)
1)3)
4)
5)
5)
IL