AT45DB321C-RI ATMEL [ATMEL Corporation], AT45DB321C-RI Datasheet - Page 20

• Manufacturer Part Number: AT45DB321C-RI
• Description: 32 MEGABIT 2.7 VOLT DATAFLASH
• Manufacturer: ATMEL [ATMEL Corporation]

Input Test Waveforms and Measurement Levels
Output Test Load
AC Waveforms
20
AT45DB321C [Preliminary]
DRIVING
LEVELS
AC
t
Four different timing waveforms are shown below. Waveform 1 shows the SCK signal
being low when CS makes a high-to-low transition, and waveform 2 shows the SCK sig-
nal being high when CS makes a high-to-low transition. In both cases, output SO
becomes valid while the SCK signal is still low (SCK low time is specified as t
waveforms 1 and 2 conform to RapidS serial interface but for frequencies up to 33 MHz
and are compatible with SPI Mode 0 and SPI Mode 3 respectively. Waveforms 1 and 2
are also compatible with inactive clock polarity low and inactive clock polarity high, since
the maximum specified frequency in that case is 33 MHz.
Waveform 3 and waveform 4 illustrate general timing diagram for RapidS serial inter-
face. These are similar to waveform 1 and waveform 2, except that output SO is not
restricted to become valid during the t
the full frequency range (maximum frequency = 40 MHz) of the RapidS serial case.
R
, t
F
< 2 ns (10% to 90%)
3.0V
0V
DEVICE
UNDER
TEST
1.5V
30 pF
WL
AC
MEASUREMENT
LEVEL
period. These timing waveforms are valid over
3387B–DFLSH–9/04
WL
). Timing