AT45DB321C-RI ATMEL [ATMEL Corporation], AT45DB321C-RI Datasheet - Page 6

• Manufacturer Part Number: AT45DB321C-RI
• Description: 32 MEGABIT 2.7 VOLT DATAFLASH
• Manufacturer: ATMEL [ATMEL Corporation]

Block Erase Addressing
Additional Commands
6
PA12
0
0
0
0
1
1
1
1
•
•
•
AT45DB321C [Preliminary]
PA11
0
0
0
0
1
1
1
1
•
•
•
PA10
0
0
0
0
1
1
1
1
•
•
•
PA9
0
0
0
0
1
1
1
1
•
•
•
MAIN MEMORY PAGE PROGRAM THROUGH BUFFER: This operation is a combina-
tion of the Buffer Write and Buffer to Main Memory Page Program with Built-in Erase
operations. Data is first clocked into buffer 1 or buffer 2 from the input pin (SI) and then
programmed into a specified page in the main memory. To initiate the operation, an 8-bit
opcode, 82H for buffer 1 or 85H for buffer 2, must first be clocked into the device, fol-
lowed by three address bytes. The address bytes are comprised of one reserved bit, 13
page address bits (PA12-PA0) that select the page in the main memory where data is to
be written, and 10 buffer address bits (BFA9-BFA0) that select the first byte in the buffer
to be written. After all address bytes are clocked in, the part will take data from the input
pins and store it in the specified data buffer. If the end of the buffer is reached, the
device will wrap around back to the beginning of the buffer. When there is a low-to-high
transition on the CS pin, the part will first erase the selected page in main memory to all
1s and then program the data stored in the buffer into that memory page. Both the erase
and the programming of the page are internally self-timed and should take place in a
maximum time of t
indicate that the part is busy.
MAIN MEMORY PAGE TO BUFFER TRANSFER: A page of data can be transferred
from the main memory to either buffer 1 or buffer 2. To start the operation, a 1-byte
opcode, 53H for buffer 1 and 55H for buffer 2, must be clocked into the device, followed
by three address bytes comprised of one reserved bit, 13 page address bits (PA12-
PA0), which specify the page in main memory that is to be transferred, and 10 don’t care
bits. The CS pin must be low while toggling the SCK pin to load the opcode and the
address bytes from the input pin (SI). The transfer of the page of data from the main
memory to the buffer will begin when the CS pin transitions from a low to a high state.
During the transfer of a page of data (t
RDY/BUSY can be monitored to determine whether the transfer has been completed.
AUTO PAGE REWRITE: This mode is only needed if multiple bytes within a page or
multiple pages of data are modified in a random fashion. This mode is a combination of
two operations: Main Memory Page to Buffer Transfer and Buffer to Main Memory Page
Program with Built-in Erase. A page of data is first transferred from the main memory to
buffer 1 or buffer 2, and then the same data (from buffer 1 or buffer 2) is programmed
back into its original page of main memory. To start the rewrite operation, a 1-byte
opcode, 58H for buffer 1 or 59H for buffer 2, must be clocked into the device, followed
by three address bytes comprised of one reserved bit, 13 page address bits (PA12-PA0)
PA8
0
0
0
0
1
1
1
1
•
•
•
PA7
0
0
0
0
1
1
1
1
•
•
•
EP
PA6
0
0
0
0
1
1
1
1
•
•
•
. During this time, the status register and the RDY/BUSY pin will
PA5
0
0
0
0
1
1
1
1
•
•
•
PA4
0
0
1
1
0
0
1
1
•
•
•
XFR
), the status register can be read or the
PA3
0
1
0
1
0
1
0
1
•
•
•
PA2
X
X
X
X
X
X
X
X
•
•
•
PA1
X
X
X
X
X
X
X
X
•
•
•
PA0
X
X
X
X
X
X
X
X
•
•
•
3387B–DFLSH–9/04
Block
1020
1021
1022
1023
0
1
2
3
•
•
•