TE28F200B5T80 INTEL [Intel Corporation], TE28F200B5T80 Datasheet - Page 22

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TE28F200B5T80

Manufacturer Part Number
TE28F200B5T80
Description
SMART 5 BOOT BLOCK FLASH MEMORY FAMILY 2, 4, 8 MBIT
Manufacturer
INTEL [Intel Corporation]
Datasheet

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SMART 5 BOOT BLOCK MEMORY FAMILY
22
FULL STATUS CHECK PROCEDURE
Read Status Register
Check if Desired
Data (See Above)
Block Address
Write D0H and
Block Address
Read Status
Block Erase
Write 20H,
Full Status
Complete
Block Erase
SR.4,5 =
Successful
Register
SR.3 =
SR.7 =
SR.5 =
Start
0
0
0
1
0
1
1
1
NO
Suspend
Command Sequence
V
Erase
PP
Figure 9. Automated Block Erase Flowchart
Block Erase
Range Error
Error
Suspend Erase
Error
YES
Loop
Operation
Repeat for subsequent block erasures.
Full Status Check can be done after each block erase, or after a
Write FFH after the last operation to reset device to read array mode.
SR.3 MUST be cleared, if set during an erase attempt, before further
SR.5 is only cleared by the Clear Status Register Command, in
If error is detected, clear the Status Register before attempting
Standby
sequence of block erasures.
attempts are allowed by the Write State Machine.
cases where multiple blocks are erase before full status is checked.
retry or other error recovery.
Write
Write
Read
Operation
Standby
Standby
Standby
Bus
Bus
Erase Setup
Confirm
Command
Erase
ADVANCE INFORMATION
Command
Data = 20H
Addr = Within Block to be Erased
Data = D0H
Addr = Within Block to be Erased
Status Register Data
Toggle CE# or OE#
Check SR.7
1 = WSM Ready
0 = WSM Busy
to Update Status Register
Check SR.3
1 = V
Check SR.4,5
Both 1 = Command
Check SR.5
1 = Block Erase Error
PP
Comments
Comments
Low Detect
Sequence Error
0599-08

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