CP2400 SILABS [Silicon Laboratories], CP2400 Datasheet - Page 98

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CP2400

Manufacturer Part Number
CP2400
Description
128/64 SEGMENT LCD DRIVER
Manufacturer
SILABS [Silicon Laboratories]
Datasheet

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CP2400/1/2/3
SFR Definition 13.6. TMR1CN: Timer 1 Control
SFR Address = 0x59
98
Name
Reset
7:6
Bit
Type
5
4
3
2
1
0
Bit
TF1CEN
TF1LEN
T1XCLK
Unused
Unused
Unused
Name
TR1
R/W
7
0
Read = 00b. Write = Don’t Care.
Timer 1 Low Byte Interrupt Enable.
When set to 1, this bit enables Timer 1 Low Byte interrupts. If Timer 1 interrupts are enabled,
an interrupt will be generated when the low byte of Timer 1 overflows.
Timer 1 SmaRTClock Oscillator Capture Enable.
When set to 1, this bit enables the Timer 1 SmaRTClock Oscillator capture mode.
Read = 00b. Write = Don’t Care.
Timer 1 Run Control.
Timer 1 is enabled by setting this bit to 1.
Read = 0b. Write = Don’t Care.
Timer 1 External Clock Select.
0: Timer 1 is clocked from the system clock divided by 12.
1: Timer 1 is clocked from the SmaRTClock oscillator divided by 8.
R/W
6
0
TF1LEN
R/W
5
0
Rev. 1.0
TF1CEN
R/W
4
0
Function
R/W
3
0
TR1
R/W
2
0
R/W
1
0
R/W
0
0

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