ADP1046-100-EVALZ AD [Analog Devices], ADP1046-100-EVALZ Datasheet - Page 59

• Manufacturer Part Number: ADP1046-100-EVALZ
• Description: Digital Controller for Isolated
• Manufacturer: AD [Analog Devices]

Data Sheet
Table 47. Register 0x2F—OTP Threshold
Bits
[7:0]
Table 48. Register 0x30—OrFET
Bits
7
[6:5]
[4:2]
1
0
Bit Name
OrFET enable
delay
OrFET enable
threshold
Fast OrFET
threshold
Fast OrFET
debounce
Fast OrFET
bypass
Bit Name
OTP threshold
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
This register, adding 0 as the MSB, results in a 9-bit OTP threshold value. This 9-bit value is compared to
the nine MSBs of the RTD ADC reading. If the RTD ADC reading is lower than the threshold set by these
bits, the OTP flag is set. This 8-bit register provides 256 threshold settings from 0 mV to 800 mV. One LSB
equates to 800 mV/256 = 3.125 mV. Some of the threshold settings at the high and low ends of the
range are not allowed. The OTP flag has a hysteresis of 16 mV.
Bit 7
0
0
0
0
0
0
…
1
1
…
1
Description
0 = delay of 328 μs, equivalent to 9 bits of (VS1 − VS2) data.
1 = delay of 164 μs, equivalent to 8 bits of (VS1 − VS2) data.
These bits program the voltage difference between VS1 and VS2 before the OrFET is enabled. The VS1
and VS2 input pins are used to control the OrFET enable function.
Bit 6
0
0
1
1
These bits program the threshold voltage difference between CS2+ and CS2− at which the OrFET is
disabled. The CS2+ and CS2− input pins are used to control this function. The internal circuit is an analog
comparator.
Bit 4
0
0
0
0
1
1
1
1
These bits determine the debounce on the fast OrFET control before it disables the OrFET.
0 = 40 ns.
1 = 200 ns.
Set this bit to completely bypass fast OrFET control. The action programmed for the OrFET flag is
executed, unless the flag is programmed to be ignored.
Bit 6
0
0
0
0
0
0
…
1
1
…
1
Bit 5
0
1
0
1
Bit 3
0
0
1
1
0
0
1
1
…
…
…
…
…
…
…
…
…
…
…
…
ADC Full-Scale
Range (%)
−2
−1
−0.5
0
Bit 2
0
1
0
1
0
1
0
1
Rev. 0 | Page 59 of 96
Bit 3
0
0
0
0
0
0
…
1
1
…
1
Voltage Difference from CS2+ to CS2− (mV)
−3
−6
−9
−12
−15
−18
−21
−24
Bit 2
0
0
0
0
1
1
…
0
0
…
1
V
−384
−192
−96
0
OUT
= 12 V (mV)
Bit 1
0
0
1
1
0
0
…
0
1
…
1
Voltage Difference from VS1 to VS2
Bit 0
0
1
0
1
0
1
…
1
0
…
1
OTP Limit (mV)
0
3.125
6.25
9.375
12.5
15.625
…
778.125
781.25
796.875
V
−1504
−752
−376
0
OUT
= 48 V (mV)
ADP1046